公开(公告)号：US11990386B2

公开(公告)日：2024-05-21

申请号：US17333570

申请日：2021-05-28

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Christopher Malone ,  Woon-Seong Kwon ,  Emad Samadiani ,  Melanie Beauchemin ,  Padam Jain ,  Teckgyu Kang ,  Yuan Li ,  Connor Burgess ,  Norman Paul Jouppi ,  Nicholas Stevens-Yu ,  Yingying Wang

IPC: H01L23/00 ,  H01L23/373 ,  H05K3/34 ,  H05K7/20 ,  H01L25/065

CPC classification number: H01L23/3732 ,  H01L23/562 ,  H01L24/32 ,  H01L24/83 ,  H05K3/3436 ,  H05K7/20254 ,  H01L25/0655 ,  H01L2223/58 ,  H01L2224/32 ,  H01L2224/32245 ,  H01L2924/15311 ,  H05K2201/10378 ,  H05K2203/041

Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.

公开(公告)号：US20240347414A1

公开(公告)日：2024-10-17

申请号：US18634198

申请日：2024-04-12

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Christopher Malone ,  Woon-Seong Kwon ,  Emad Samadiani ,  Melanie Beauchemin ,  Padam Jain ,  Teckgyu Kang ,  Yuan Li ,  Connor Burgess ,  Norman Paul Jouppi ,  Nicholas Stevens-Yu ,  Yingying Wang

IPC: H01L23/373 ,  H01L23/00 ,  H01L25/065 ,  H05K3/34 ,  H05K7/20

CPC classification number: H01L23/3732 ,  H01L23/562 ,  H01L24/32 ,  H01L24/83 ,  H05K3/3436 ,  H05K7/20254 ,  H01L25/0655 ,  H01L2223/58 ,  H01L2224/32 ,  H01L2224/32245 ,  H01L2924/15311 ,  H05K2201/10378 ,  H05K2203/041

Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.

公开(公告)号：US20210378106A1

公开(公告)日：2021-12-02

申请号：US17333570

申请日：2021-05-28

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Christopher Malone ,  Woon-Seong Kwon ,  Emad Samadiani ,  Melanie Beauchemin ,  Padam Jain ,  Teckgyu Kang ,  Yuan Li ,  Connor Burgess ,  Norman Paul Jouppi ,  Nicholas Stevens-Yu ,  Yingying Wang

IPC: H05K3/34 ,  H05K7/20 ,  H01L23/00

Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.

公开(公告)号：US12243802B2

公开(公告)日：2025-03-04

申请号：US18634198

申请日：2024-04-12

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Christopher Malone ,  Woon-Seong Kwon ,  Emad Samadiani ,  Melanie Beauchemin ,  Padam Jain ,  Teckgyu Kang ,  Yuan Li ,  Connor Burgess ,  Norman Paul Jouppi ,  Nicholas Stevens-Yu ,  Yingying Wang

IPC: H01L23/00 ,  B23K1/00 ,  H01L23/373 ,  H05K3/34 ,  H05K7/20 ,  H01L25/065

Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.