公开(公告)号：US10110170B2

公开(公告)日：2018-10-23

申请号：US15267455

申请日：2016-09-16

Applicant: Freescale Semiconductor, Inc.

Inventor： Margaret A. Szymanowski ,  Sarmad K. Musa ,  Fernando A. Santos ,  Mahesh K. Shah

IPC: H03F1/02 ,  H01L23/495 ,  H01L23/552 ,  H03F3/213 ,  H01L23/31 ,  H01L23/492 ,  H01L23/66 ,  H03F3/195 ,  H01L21/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H03F3/21

Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.

公开(公告)号：US09300254B2

公开(公告)日：2016-03-29

申请号：US14316484

申请日：2014-06-26

Applicant: Freescale Semiconductor, Inc.

Inventor： Mahesh K. Shah ,  Jerry L. White ,  Li Li ,  Hussain H. Ladhani ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan ,  Fernando A. Santos

IPC: H03F3/213 ,  H03F1/30 ,  H03H1/00 ,  H03F3/195

CPC classification number: H03F1/0288 ,  H01L23/3107 ,  H01L23/49562 ,  H01L23/642 ,  H01L23/66 ,  H01L2223/665 ,  H01L2223/6655 ,  H01L2223/6666 ,  H01L2224/49175 ,  H01L2924/0002 ,  H03F1/0283 ,  H03F1/30 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2200/555 ,  H03F2203/21103 ,  H03F2203/21106 ,  H03F2203/21139 ,  H03H1/00 ,  H03H7/38 ,  H03H2001/0021 ,  H05K7/005 ,  H01L2924/00

Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

Abstract translation: 射频（RF）器件的一个实施例包括至少一个晶体管，封装和表面贴装电容器。 该封装包含至少一个晶体管，并且包括至少一个端接。 表面安装电容器以至少一个晶体管和该器件的电源端之间的分流配置耦合，以将至少一个晶体管与电源分离。

公开(公告)号：US09800208B2

公开(公告)日：2017-10-24

申请号：US15044701

申请日：2016-02-16

Applicant: Freescale Semiconductor, Inc.

Inventor： Mahesh K. Shah ,  Jerry L. White ,  Li Li ,  Hussain H. Ladhani ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan ,  Fernando A. Santos

IPC: H03F1/00 ,  H03F1/02 ,  H03F3/195 ,  H03F3/213 ,  H03F1/56 ,  H03F3/21 ,  H03F1/30 ,  H03H1/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/66 ,  H03F3/193 ,  H05K7/00 ,  H01L23/64 ,  H03H7/38

CPC classification number: H03F1/0288 ,  H01L23/3107 ,  H01L23/49562 ,  H01L23/642 ,  H01L23/66 ,  H01L2223/665 ,  H01L2223/6655 ,  H01L2223/6666 ,  H01L2224/49175 ,  H01L2924/0002 ,  H03F1/0283 ,  H03F1/30 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2200/555 ,  H03F2203/21103 ,  H03F2203/21106 ,  H03F2203/21139 ,  H03H1/00 ,  H03H7/38 ,  H03H2001/0021 ,  H05K7/005 ,  H01L2924/00

Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

公开(公告)号：US20170005621A1

公开(公告)日：2017-01-05

申请号：US15267455

申请日：2016-09-16

Applicant: Freescale Semiconductor, Inc.

Inventor： Margaret A. Szymanowski ,  Sarmad K. Musa ,  Fernando A. Santos ,  Mahesh K. Shah

IPC: H03F1/02 ,  H01L23/495 ,  H01L23/552 ,  H03F3/195 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H03F3/213 ,  H01L23/00 ,  H03F3/21

CPC classification number: H03F1/0288 ,  H01L21/4821 ,  H01L23/3121 ,  H01L23/492 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48195 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/451 ,  H03F2203/21106 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.

Abstract translation: 提出了一种用于封装包括壁以减少电磁耦合的半导体器件的系统和方法。 半导体器件具有基板，第一电路和第二电路在其上彼此靠近地形成。 导电材料的隔离壁位于第一电路和第二电路之间，隔离壁被配置为在半导体器件的操作期间减小第一和第二电路之间的电感耦合。 介绍了几种类型的隔离墙。

公开(公告)号：US08963305B2

公开(公告)日：2015-02-24

申请号：US13624232

申请日：2012-09-21

Applicant: Freescale Semiconductor, Inc.

Inventor： Fernando A. Santos ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan

IPC: H01L23/495 ,  H01L23/48

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49579 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/85801 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20755 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/13099

Abstract: A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of 240° C. A first electrical interconnect couples the die and the leadframe. A housing covers portions of the leadframe, die carrier, die and first electrical interconnect.

Abstract translation: 封装的半导体器件可以包括安装到引线框的引线框架和管芯载体。 模具载体由导电和导热材料形成。 模具安装到模具载体的表面，模头附着材料具有超过240℃的熔点。第一电互连使模具和引线框架相连。 壳体覆盖引线框架，管芯载体，管芯和第一电互连部分。

公开(公告)号：US09337774B2

公开(公告)日：2016-05-10

申请号：US14491574

申请日：2014-09-19

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Margaret A. Szymanowski ,  L. M. Mahalingam ,  Sarmad K. Musa ,  Fernando A. Santos ,  Jerry L. White

IPC: H01L23/66 ,  H03F1/02 ,  H01L21/56 ,  H01L25/065 ,  H03F1/42 ,  H03F3/19 ,  H03F3/21 ,  H01L23/64

CPC classification number: H01L25/0652 ,  H01L21/565 ,  H01L23/645 ,  H01L23/66 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6644 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2224/05644 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/48195 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H03F1/0288 ,  H03F1/565 ,  H03F3/193 ,  H03F2200/36 ,  H03F2200/451 ,  H01L2924/014 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An embodiment of a packaged radio frequency (RF) device includes a device substrate with a voltage reference plane, a first input lead coupled to the device substrate, a first output lead coupled to the device substrate, a first transistor die coupled to a top surface of the device substrate with a solder bond, a second die coupled to the top surface of the device substrate with a conductive epoxy that electrically couples at least one component of the second die to the voltage reference plane, and non-conductive molding compound over the top surface of the device substrate and encompassing the first transistor die, the second die, a portion of the first input lead, and a portion of the first output lead.

Abstract translation: 封装射频（RF）器件的实施例包括具有电压参考平面的器件衬底，耦合到器件衬底的第一输入引线，耦合到器件衬底的第一输出引线，耦合到顶表面的第一晶体管管芯 具有焊接接合的器件衬底，第二管芯，其与导电环氧树脂耦合到器件衬底的顶表面，导电环氧树脂将第二管芯的至少一个部件电耦合到电压参考平面;以及非导电模塑料 并且包围第一晶体管管芯，第二管芯，第一输入引线的一部分和第一输出引线的一部分。

公开(公告)号：US09986646B2

公开(公告)日：2018-05-29

申请号：US14549934

申请日：2014-11-21

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Lakshminarayan Viswanathan ,  Audel A. Sanchez ,  Fernando A. Santos ,  Jerry L. White

IPC: H05K1/18 ,  H05K3/28 ,  H05K1/16 ,  H05K7/00 ,  H05K9/00 ,  H01L21/56 ,  H01L33/52 ,  H01L31/0203 ,  H01L23/28 ,  H01L23/22 ,  H01L31/048 ,  H05K3/34

CPC classification number: H05K3/284 ,  H01L21/56 ,  H01L23/22 ,  H01L23/28 ,  H01L31/0203 ,  H01L31/048 ,  H01L33/52 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48137 ,  H01L2224/73227 ,  H01L2224/73267 ,  H01L2224/92164 ,  H01L2224/92244 ,  H05K1/185 ,  H05K3/3421 ,  H05K9/0052 ,  H05K9/0081 ,  H05K2201/10166 ,  H05K2201/10371 ,  H05K2201/10977 ,  H05K2203/1316 ,  H05K2203/1327

Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.

公开(公告)号：US20140084432A1

公开(公告)日：2014-03-27

申请号：US13624232

申请日：2012-09-21

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Fernando A. Santos ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan

IPC: H01L23/495 ,  H01L21/60 ,  H01L23/48

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49579 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/85801 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20755 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/13099

Abstract: A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of 240° C. A first electrical interconnect couples the die and the leadframe. A housing covers portions of the leadframe, die carrier, die and first electrical interconnect.

Abstract translation: 封装的半导体器件可以包括安装到引线框的引线框架和管芯载体。 模具载体由导电和导热材料形成。 模具安装到模具载体的表面，模头附着材料具有超过240℃的熔点。第一电互连使模具和引线框架相连。 壳体覆盖引线框架，管芯载体，管芯和第一电互连部分。

公开(公告)号：US09450547B2

公开(公告)日：2016-09-20

申请号：US14104870

申请日：2013-12-12

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Margaret A. Szymanowski ,  Sarmad K. Musa ,  Fernando A. Santos ,  Mahesh K. Shah

IPC: H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L23/552 ,  H01L21/56 ,  H03F3/213 ,  H03F1/02 ,  H01L23/492

CPC classification number: H03F1/0288 ,  H01L21/4821 ,  H01L23/3121 ,  H01L23/492 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48195 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/451 ,  H03F2203/21106 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.

Abstract translation: 提出了一种用于封装包括壁以减少电磁耦合的半导体器件的系统和方法。 半导体器件具有基板，第一电路和第二电路在其上彼此靠近地形成。 导电材料的隔离壁位于第一电路和第二电路之间，隔离壁被配置为在半导体器件的操作期间减小第一和第二电路之间的电感耦合。 介绍了几种类型的隔离墙。