公开(公告)号：US11366661B2

公开(公告)日：2022-06-21

申请号：US16888525

申请日：2020-05-29

Applicant: Electronics and Telecommunications Research Institute

Inventor： Jin-Suk Ma ,  Hag Young Kim ,  Myeong-Hoon Oh ,  Won-Ok Kwon ,  Hyuk Je Kwon ,  Young Woo Kim ,  Chanho Park ,  Song-woo Sok ,  Byung Kwon Jung

IPC: G06F9/30 ,  G06F17/16 ,  G06F9/54

Abstract: A method for generating and processing extended instructions and an apparatus using the method are provided. The method includes: transmitting, by a first device, a request packet according to an extended instruction that is generated based on a Gen-Z interface standard to a second device; and receiving, by the first device, a response packet including a result of performing the request packet from the second device. The extended instruction is generated based on a vendor-defined instruction set of the Gen-Z interface.

公开(公告)号：US09729279B2

公开(公告)日：2017-08-08

申请号：US14800603

申请日：2015-07-15

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Seok Choi ,  Hyuk Je Kwon

IPC: G06F11/00 ,  H03M13/00 ,  H04L1/18 ,  G06F11/10 ,  G06F13/42

CPC classification number: H04L1/1858 ,  G06F11/1004 ,  G06F13/4282

Abstract: Provided are a packet transmission and reception system, apparatus, and method. The packet transmission and reception system for distributing and transmitting data through a plurality of multi-lanes includes a first transmission and reception apparatus configured to include a plurality of first physical lanes and a plurality of first logical lanes connected to the plurality of first physical lanes, and a second transmission and reception apparatus configured to include a plurality of second physical lanes and a plurality of second logical lanes connected to the plurality of second physical lanes.

公开(公告)号：US10466413B2

公开(公告)日：2019-11-05

申请号：US15607717

申请日：2017-05-30

Applicant: Electronics and Telecommunications Research Institute

Inventor： Gyungock Kim ,  Hyundai Park ,  In Gyoo Kim ,  Sang Hoon Kim ,  Ki Seok Jang ,  Sang Gi Kim ,  Jiho Joo ,  Yongseok Choi ,  Hyuk Je Kwon ,  Jaegyu Park ,  Sun Ae Kim ,  Jin Hyuk Oh ,  Myung joon Kwack

IPC: G02B6/12 ,  H01L31/167 ,  G02B6/42 ,  G02B6/13 ,  H01L21/762 ,  H01L27/15

Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.

公开(公告)号：US10168474B2

公开(公告)日：2019-01-01

申请号：US15607726

申请日：2017-05-30

Applicant: Electronics and Telecommunications Research Institute

Inventor： Gyungock Kim ,  Hyundai Park ,  In Gyoo Kim ,  Sang Hoon Kim ,  Ki Seok Jang ,  Sang Gi Kim ,  Jiho Joo ,  Yongseok Choi ,  Hyuk Je Kwon ,  Jaegyu Park ,  Sun Ae Kim ,  Jin Hyuk Oh ,  myung joon Kwack

IPC: G02B6/12 ,  G02B6/42 ,  G02B6/13 ,  H01L21/762 ,  H01L27/15 ,  H01L31/167

Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.

公开(公告)号：US09690042B2

公开(公告)日：2017-06-27

申请号：US14062454

申请日：2013-10-24

Applicant: Electronics and Telecommunications Research Institute

Inventor： Gyungock Kim ,  Hyundai Park ,  In Gyoo Kim ,  Sang Hoon Kim ,  Ki Seok Jang ,  Sang Gi Kim ,  Jiho Joo ,  Yongseok Choi ,  Hyuk Je Kwon ,  Jaegyu Park ,  Sun Ae Kim ,  Jin Hyuk Oh ,  Myung Joon Kwack

IPC: H01L27/15 ,  H01L31/153 ,  G02B6/12 ,  G02B6/13 ,  G02B6/42 ,  H01L21/762

CPC classification number: G02B6/12004 ,  G02B6/13 ,  G02B6/4206 ,  G02B6/4214 ,  H01L21/762 ,  H01L27/15 ,  H01L31/167

Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.

公开(公告)号：US10216655B2

公开(公告)日：2019-02-26

申请号：US15194407

申请日：2016-06-27

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Seok Choi ,  Hyuk Je Kwon

IPC: G06F13/00 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42 ,  G06F12/0813

Abstract: A memory interface apparatus is provided. The apparatus includes a central processing unit (CPU)-side protocol processor connected to a CPU through a parallel interface and a memory-side protocol processor connected to a memory through a parallel interface, and the CPU-side protocol processor and the memory-side protocol processor are connected through a serial link.

公开(公告)号：US09947291B2

公开(公告)日：2018-04-17

申请号：US14994454

申请日：2016-01-13

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yong Seok Choi ,  Hyuk Je Kwon

IPC: G06F15/173 ,  G09G5/00 ,  G06F13/36 ,  G06F13/40

CPC classification number: G09G5/006 ,  G06F13/36 ,  G06F13/4081 ,  G09G2370/022 ,  G09G2370/10 ,  G09G2370/20 ,  G09G2370/24 ,  Y02D10/14 ,  Y02D10/151

Abstract: A system for a multi-computer control according to an exemplary embodiment may include: an integrated process server to receive, from one or more computer terminals, display information including video data and terminal identification information through a physical layer transceiver, multiplex and serialize the received display information, transmit the multiplexed and serialized display information to a user process terminal, and transmit a received user input signal to a corresponding computer terminal; and the user process terminal to mix the display information and the multi-control interface, display, on a display device, the execution screens of the activated computer terminals, and transmit the user input signal to the integrated process server along with corresponding terminal identification information, wherein the display information is received from the integrated process server, and the user input signal is received from an input device.