公开(公告)号：US5882984A

公开(公告)日：1999-03-16

申请号：US728305

申请日：1996-10-09

Applicant: Der-Tsyr Fan ,  Chon-Shin Jou ,  Ting S. Wang

Inventor： Der-Tsyr Fan ,  Chon-Shin Jou ,  Ting S. Wang

IPC: H01L21/762 ,  H01L21/8242 ,  H01L21/76

CPC classification number: H01L27/10844 ,  H01L21/76202

Abstract: The present invention is a method for increasing the refresh time of DRAM. This invention is for decreasing the stress between the bird's beak of field oxide and silicon substrate by using fluorine ion implant before field oxidation and the optimal structure of LOCOS to effectively preventing the current leakage from the bird's beak of field oxide. Therefore, this invention can increase the refresh time of DRAM and greatly enhance the performance in DRAM.

Abstract translation: 本发明是增加DRAM刷新时间的方法。 本发明是通过在场氧化之前使用氟离子注入和LOCOS的最佳结构来减少场氧化物的鸟嘴和硅衬底之间的应力，以有效地防止来自场氧化物的鸟喙的电流泄漏。 因此，本发明可以增加DRAM的刷新时间并大大提高DRAM的性能。

公开(公告)号：US06380072B2

公开(公告)日：2002-04-30

申请号：US09725602

申请日：2000-11-29

Applicant: John Chu ,  Der-Tsyr Fan ,  Chon-Shin Jou ,  Ting S. Wang

Inventor： John Chu ,  Der-Tsyr Fan ,  Chon-Shin Jou ,  Ting S. Wang

IPC: H01L214763

CPC classification number: H01L21/02

Abstract: A method for manufacturing a semiconductor device having an excellent metallization is provided. The method includes the steps of a). providing a semiconductor substrate, b) forming a conductive layer on the semiconductor substrate, c) forming a dielectric layer on the conductive layer, d) forming a titanium nitride layer directly on the dielectric layer without contacting the conductive layer, and e) patternizing the titanium nitride layer, the dielectric layer and the conductive layer, wherein the dielectric layer is used for avoiding spontaneous electrochemical reaction between the titanium nitride layer and the conductive layer,

Abstract translation: 提供了一种制造具有优异金属化的半导体器件的方法。 该方法包括以下步骤：a）。 提供半导体衬底，b）在所述半导体衬底上形成导电层，c）在所述导电层上形成电介质层，d）直接在所述电介质层上形成氮化钛层而不与所述导电层接触，e）使 氮化钛层，电介质层和导电层，其中介电层用于避免氮化钛层和导电层之间的自发电化学反应，

公开(公告)号：US5037766A

公开(公告)日：1991-08-06

申请号：US466583

申请日：1990-01-17

Applicant: Ting S. Wang

Inventor： Ting S. Wang

IPC: H01L21/02 ,  H01L21/3215 ,  H01L21/336 ,  H01L27/11 ,  H01L29/786

CPC classification number: H01L28/20 ,  H01L21/32155 ,  H01L29/66757 ,  H01L29/78618 ,  H01L27/1112 ,  Y10S148/136 ,  Y10S438/922 ,  Y10S438/98

Abstract: A method of fabricating a double layered polisilicon film with oxygen diffusion for scaled down polysilicon thin film transistor/resistor. The double layered polysilicon film structure includes: a first heavily doped polysilicon layer, produced by Low Pressure Chemical Vapor Deposition (LPCVD) system at about 610 degrees Centigrade, is used as electrodes of resistor or source/drain electrodes of a transistor, and a second layer of polysilicon, deposited by LPCVD at the temperature about 560 degrees Centigrade, is used as a resistor layer or a channel layer of a transistor.Oxygen treatment is applied at low temperature after the first polysilicon layer is defined. The oxygen present at polysilicon grain boundary blocks the dopant diffusing from the first electrode polysilicon to the second polysilicon which is used as resistor region or a channel region of a transistor. Thus, the resistor can maintain high resistivity and the transistor can maintain low threshold voltage even when they are scaled down.

Abstract translation: 一种制造具有氧扩散的双层硅胶膜的方法，用于按比例缩小的多晶硅薄膜晶体管/电阻器。 双层多晶硅膜结构包括：用于在610摄氏度的低压化学气相沉积（LPCVD）系统产生的第一重掺杂多晶硅层，用作晶体管的电阻或源极/漏极的电极，第二 通过LPCVD在约560摄氏度的温度下沉积的多晶硅层被用作晶体管的电阻层或沟道层。 在定义第一多晶硅层之后，在低温下进行氧化处理。 存在于多晶硅晶界处的氧阻挡从第一电极多晶硅向第二多晶硅扩散的掺杂​​剂，该第二多晶硅用作电阻区或晶体管的沟道区。 因此，电阻器可以保持高电阻率，并且晶体管即使在按比例缩小时也可以保持低阈值电压。