公开(公告)号：US08975609B2

公开(公告)日：2015-03-10

申请号：US13862353

申请日：2013-04-12

申请人： Crossbar, Inc.

发明人： Harry Gee ,  Sung Hyun Jo ,  Hagop Nazarian ,  Scott Brad Herner

IPC分类号： H01L47/00 ,  H01L45/00 ,  H01L21/4763 ,  G11C13/00 ,  H01L27/24

CPC分类号： H01L45/1683 ,  G11C13/0007 ,  G11C2213/71 ,  H01L21/4763 ,  H01L27/2481 ,  H01L27/249 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1266 ,  H01L45/14 ,  H01L45/148 ,  H01L45/16

摘要： A method of forming a non-volatile memory device. A substrate is provided and a first dielectric material forms overlying the substrate. A first polysilicon material is deposited overlying the first dielectric material. A second dielectric material is deposited overlying the first polysilicon material. A second polysilicon material is deposited overlying the second dielectric material. A third dielectric material is formed overlying the second polysilicon material. The third dielectric material, the second polysilicon material, the second dielectric material, and the first polysilicon material is subjected to a first pattern and etch process to form a first wordline associated with a first switching device and a second wordline associated with a second switching device from the first polysilicon material, a third wordline and associated with a third switching device, and a fourth wordline associated with a fourth switching device from the second polysilicon material. A via opening is formed to separate the first wordline from the second wordline and to separate the third wordline from the fourth wordline. An amorphous silicon switching material is deposited conformably overlying the via opening. A metal material fills the via opening and overlies the amorphous silicon material and connected to a common bitline.

摘要翻译： 一种形成非易失性存储器件的方法。 提供衬底并且形成覆盖衬底的第一介电材料。 第一多晶硅材料沉积在第一介电材料上。 沉积在第一多晶硅材料上的第二介电材料。 第二多晶硅材料沉积在第二介电材料上。 形成覆盖第二多晶硅材料的第三介电材料。 对第三介电材料，第二多晶硅材料，第二介电材料和第一多晶硅材料进行第一图案和蚀刻工艺以形成与第一开关器件相关联的第一字线和与第二开关器件相关联的第二字线 来自第一多晶硅材料的第三字线和与第三开关器件相关联的第三字线以及与第四开关器件相关联的第四字线从第二多晶硅材料。 形成通孔开口以将第一字线与第二字线分开，并将第三字线与第四字线分开。 将非晶硅开关材料顺应地沉积在通孔开口上方。 金属材料填充通孔开口并覆盖非晶硅材料并连接到公共位线。

公开(公告)号：US08659003B2

公开(公告)日：2014-02-25

申请号：US13733828

申请日：2013-01-03

申请人： Crossbar, Inc.

发明人： Scott Brad Herner ,  Hagop Nazarian

IPC分类号： H01L29/06

CPC分类号： H01L27/2463 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/148 ,  H01L45/1608 ,  H01L45/1675

摘要： A method of forming a disturb-resistant non volatile memory device. The method includes providing a semiconductor substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring material overlies the first dielectric material, a doped polysilicon material overlies the first wiring material, and an amorphous silicon switching material overlies the said polysilicon material. The switching material is subjected to a first patterning and etching process to separating a first strip of switching material from a second strip of switching spatially oriented in a first direction. The first strip of switching material, the second strip of switching material, the contact material, and the first wiring material are subjected to a second patterning and etching process to form at least a first switching element from the first strip of switching material and at least a second switching element from the second strip of switching material, and a first wiring structure comprising at least the first wiring material and the contact material. The first wiring structure being is in a second direction at an angle to the first direction.

摘要翻译： 一种形成抗干扰非易失性存储器件的方法。 该方法包括提供具有表面区域并形成覆盖表面区域的第一电介质材料的半导体衬底。 第一布线材料覆盖在第一介电材料上，掺杂多晶硅材料覆盖在第一布线材料上，非晶硅开关材料覆盖在所述多晶硅材料上。 对开关材料进行第一图案化和蚀刻工艺，以将第一条开关材料与在第一方向上空间取向的第二开关条分离。 第一切换材料条，第二条切换材料，接触材料和第一布线材料经受第二图案化和蚀刻工艺，以从第一条开关材料形成至少第一开关元件，并且至少 来自所述第二开关材料条的第二开关元件，以及至少包括所述第一布线材料和所述接触材料的第一布线结构。 第一布线结构处于与第一方向成一定角度的第二方向。

公开(公告)号：US09035276B2

公开(公告)日：2015-05-19

申请号：US14175062

申请日：2014-02-07

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L21/00 ,  H01L45/00 ,  H01L27/24

CPC分类号： H01L27/2463 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/122 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/148 ,  H01L45/16

摘要： A memory device includes a first plurality of memory cells arranged in a first crossbar array, a first thickness of dielectric material overlying the first plurality of memory cells, and a second plurality of memory cells arranged in a second crossbar array overlying the first thickness of dielectric material. The memory device further includes a second thickness of dielectric material overlying the second plurality of memory cells. In a specific embodiment, the memory device further includes a Nth thickness of dielectric material overlying an Nth plurality of memory cells, where N is an integer ranging from 3 to 8.

摘要翻译： 存储器件包括布置在第一交叉开关阵列中的第一多个存储器单元，覆盖在第一多个存储单元上的第一厚度的介电材料，以及布置在覆盖第一厚度电介质的第二十字开关阵列中的第二多个存储单元 材料。 存储器件还包括覆盖第二多个存储器单元的介电材料的第二厚度。 在具体实施例中，存储器件还包括覆盖第N个多个存储器单元的第N厚度的介电材料，其中N是3至8的整数。

公开(公告)号：US09755143B2

公开(公告)日：2017-09-05

申请号：US14455817

申请日：2014-08-08

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L45/00

CPC分类号： H01L45/1273 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

摘要： A switching device includes a first dielectric material formed overlying a substrate. A bottom wiring material and a switching material are sequentially formed overlying the first dielectric material. The bottom wiring material and the switching material are patterned and etched to form a first structure having a top surface region and a side region. The first structure includes a bottom wiring structure and a switching element having the top surface region including an exposed region. A second dielectric material is formed overlying the first structure. A first opening region is formed in a portion of the second dielectric layer to expose a portion of the top surface region. A dielectric side wall structure is formed overlying a side region of the first opening region. A top wiring material including a conductive material is formed overlying the top surface region to be directly contact with the switching element.

公开(公告)号：US09362499B2

公开(公告)日：2016-06-07

申请号：US14643832

申请日：2015-03-10

申请人： Crossbar, Inc.

发明人： Harry Gee ,  Sung Hyun Jo ,  Hagop Nazarian ,  Scott Brad Herner

IPC分类号： H01L21/4763 ,  H01L45/00 ,  H01L27/24 ,  G11C13/00

CPC分类号： H01L45/1683 ,  G11C13/0007 ,  G11C2213/71 ,  H01L21/4763 ,  H01L27/2481 ,  H01L27/249 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1266 ,  H01L45/14 ,  H01L45/148 ,  H01L45/16

摘要： A method of forming a non-volatile memory device. The method forms a vertical stack of first polysilicon material and a second polysilicon material layer isolated by a dielectric material. The polysilicon material layers and the dielectric material are subjected to a first pattern and etch process to form a first wordline associated with a first switching device and a second wordline associated with a second switching device from the first polysilicon material layer, and a third wordline associated with a third switching device and a fourth wordline associated with a fourth switching device from the second polysilicon material. A via opening is formed to separate the first wordline from the second wordline and to separate the third wordline from the fourth wordline. An amorphous silicon switching material is deposited conformably overlying the via opening. A metal material fills the via opening and connects to a common bitline.

公开(公告)号：US08993397B2

公开(公告)日：2015-03-31

申请号：US14011577

申请日：2013-08-27

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L21/44 ,  H01L21/332 ,  H01L21/336 ,  H01L21/8242 ,  H01L45/00

CPC分类号： H01L45/1675 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/148 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1666

摘要： A method of forming a memory device. The method provides a semiconductor substrate having a surface region. A first dielectric layer is formed overlying the surface region of the semiconductor substrate. A bottom wiring structure is formed overlying the first dielectric layer and a second dielectric material is formed overlying the top wiring structure. A bottom metal barrier material is formed to provide a metal-to-metal contact with the bottom wiring structure. The method forms a pillar structure by patterning and etching a material stack including the bottom metal barrier material, a contact material, a switching material, a conductive material, and a top barrier material. The pillar structure maintains a metal-to-metal contact with the bottom wiring structure regardless of the alignment of the pillar structure with the bottom wiring structure during etching. A top wiring structure is formed overlying the pillar structure at an angle to the bottom wiring structure.

摘要翻译： 一种形成存储器件的方法。 该方法提供具有表面区域的半导体衬底。 在半导体衬底的表面区域上形成第一电介质层。 形成覆盖第一电介质层的底部布线结构，并且覆盖顶部布线结构形成第二电介质材料。 形成底部金属阻挡材料以提供与底部布线结构的金属 - 金属接触。 该方法通过图案化和蚀刻包括底部金属阻挡材料，接触材料，开关材料，导电材料和顶部阻挡材料的材料堆叠形成柱结构。 柱状结构保持与底部布线结构的金属 - 金属接触，而与在蚀刻期间柱状结构与底部布线结构的对准无关。 顶部布线结构以与底部布线结构成角度的方式形成在柱状结构上。

公开(公告)号：US08648327B2

公开(公告)日：2014-02-11

申请号：US13679976

申请日：2012-11-16

申请人： Crossbar Inc.

发明人： Scott Brad Herner

IPC分类号： H01L47/00

CPC分类号： H01L27/2463 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/122 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/148 ,  H01L45/16

摘要： A memory device includes a first plurality of memory cells arranged in a first crossbar array, a first thickness of dielectric material overlying the first plurality of memory cells, and a second plurality of memory cells arranged in a second crossbar array overlying the first thickness of dielectric material. The memory device further includes a second thickness of dielectric material overlying the second plurality of memory cells. In a specific embodiment, the memory device further includes a Nth thickness of dielectric material overlying an Nth plurality of memory cells, where N is an integer ranging from 3 to 8.

摘要翻译： 存储器件包括布置在第一交叉开关阵列中的第一多个存储器单元，覆盖在第一多个存储单元上的第一厚度的介电材料，以及布置在覆盖第一厚度电介质的第二十字开关阵列中的第二多个存储单元 材料。 存储器件还包括覆盖第二多个存储器单元的介电材料的第二厚度。 在具体实施例中，存储器件还包括覆盖第N个多个存储器单元的第N厚度的介电材料，其中N是3至8的整数。

公开(公告)号：US09831289B2

公开(公告)日：2017-11-28

申请号：US14325289

申请日：2014-07-07

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L27/24 ,  H01L45/00

CPC分类号： H01L27/2463 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1683

摘要： A method of forming a disturb-resistant non volatile memory device includes providing a substrate and forming a first dielectric thereon, forming a first strip of material separated from a second strip of material from a first wiring material, and forming a second dielectric thereon to fill a gap between the first and second strips of material. Openings are formed in the second dielectric exposing portions of the first wiring material. Filing the openings by p+ polysilicon contact material, and then an undoped amorphous silicon material, and then a metal material. A second wiring structure is formed thereon to contact the metal material in the openings. Resistive switching cells are formed from the first wiring structure, the second wiring structure, the contact material, the undoped amorphous silicon material, and the metal material.

公开(公告)号：US09659819B2

公开(公告)日：2017-05-23

申请号：US13764698

申请日：2013-02-11

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L27/24

CPC分类号： H01L21/76895 ,  H01L23/5226 ,  H01L27/2481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure.

公开(公告)号：US09412789B1

公开(公告)日：2016-08-09

申请号：US14715159

申请日：2015-05-18

申请人： Crossbar, Inc.

发明人： Scott Brad Herner

IPC分类号： H01L47/00 ,  H01L27/24 ,  H01L45/00

CPC分类号： H01L27/2463 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/122 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/148 ,  H01L45/16

摘要： A memory device includes a first plurality of memory cells arranged in a first crossbar array, a first thickness of dielectric material overlying the first plurality of memory cells, and a second plurality of memory cells arranged in a second crossbar array overlying the first thickness of dielectric material. The memory device further includes a second thickness of dielectric material overlying the second plurality of memory cells. In a specific embodiment, the memory device further includes a Nth thickness of dielectric material overlying an Nth plurality of memory cells, where N is an integer ranging from 3 to 8.

摘要翻译： 存储器件包括布置在第一交叉开关阵列中的第一多个存储器单元，覆盖在第一多个存储单元上的第一厚度的介电材料，以及布置在覆盖第一厚度电介质的第二十字开关阵列中的第二多个存储单元 材料。 存储器件还包括覆盖第二多个存储器单元的介电材料的第二厚度。 在具体实施例中，存储器件还包括覆盖第N个多个存储器单元的第N厚度的介电材料，其中N是3至8的整数。