Abstract:
A flexible array substrate, a manufacturing method thereof and a display device are provided. The flexible array substrate includes: a first flexible substrate with a first surface; a thin film transistor on the first surface; and a light-shielding layer between the first flexible substrate and the thin film transistor. An orthographic projection of the light-shielding layer on the first flexible substrate covers an orthographic projection of a channel region of the thin film transistor on the first flexible substrate.
Abstract:
Embodiments of the present disclosure provide a display panel and a display device, the display panel includes: a base substrate; a plurality of light emitting devices on the base substrate; an encapsulation layer covering the light emitting devices; a mirror layer located on a side of the encapsulation layer away from the base substrate, the mirror layer including a plurality of first openings, and an orthographic projection of each first opening on the base substrate overlapping an orthographic projection of at least one light emitting device on the base substrate; a transparent filling layer located on a side of the encapsulation layer away from the base substrate, at least part of the transparent filling layer being located in the first openings.
Abstract:
The present disclosure provides a display substrate, a method for manufacturing the same, and a display device. The display substrate includes: a base substrate; a plurality of light emitting units on the base substrate, where the plurality of light emitting units include a plurality of pixel display areas; and a reflection layer on the base substrate. The reflection layer includes a plurality of patterns and a plurality of openings defined between adjacent patterns of the plurality of patterns, and positions of the plurality of openings are corresponding to positions of the plurality of pixel display areas.
Abstract:
Provided is a drive backplane. The drive backplane includes: a base substrate and a circuit structure. The circuit structure includes a plurality of first thin film transistors and a plurality of second thin film transistors; wherein a first active layer of the first thin film transistor includes a first oxide layer and a second oxide layer, wherein the second oxide layer is disposed on a side of the first oxide layer away from the base substrate, a mobility of the second oxide layer is lower than a mobility of the first oxide layer, and a source and a drain of the first thin film transistor are connected to the second oxide layer; and a second active layer of the second thin film transistor includes a third oxide layer, wherein a mobility of the third oxide layer is lower than the mobility of the first oxide layer.
Abstract:
A display substrate includes a base substrate, a light-emitting structure layer located on the base substrate, an encapsulation structure layer located on the light-emitting structure layer, a reflection layer located on the encapsulation structure layer, a hydrophilic material layer located on the reflection layer, and an optical adhesive layer located on the hydrophilic material layer.
Abstract:
A piezoelectric element includes: a piezoelectric part; a first substrate and a second substrate, provided at both sides of the piezoelectric part, respectively; a first electrode layer, located between the first substrate and the piezoelectric part; and a second electrode layer, located between the electrode substrate and the piezoelectric part, wherein a surface of at least one of the first substrate and the second substrate close to the piezoelectric part is provided with a convex portion.
Abstract:
A method of manufacturing a low temperature polysilicon film comprises: providing a substrate on a platform; forming a buffer layer on said substrate; forming an amorphous silicon layer on said buffer layer; and heating and annealing said amorphous silicon layer to allow said amorphous silicon layer to form a polycrystalline silicon layer; wherein a thermal insulating layer is formed on a bottom surface of said substrate or a top surface of the platform, before said buffer layer is formed on said substrate.
Abstract:
A pixel driving circuit is provided. The pixel driving circuit includes a light emission control circuit and a drive circuit. The light emission control circuit controls a potential of a control terminal of the drive circuit under the control of a coupled signal terminal, and the drive circuit drives a coupled light-emitting element to emit light based on the potential of the control terminal thereof. The drive circuit includes two drive transistors connected in parallel, and subthreshold swings of the two drive transistors are different.
Abstract:
A display panel has a display region and a bezel region located on side(s) of the display region. The display panel includes a substrate; a plurality of sub-pixels disposed on a side of the substrate and located in the display region; a mirror layer disposed on a side of the plurality of sub-pixels away from the substrate; and an electrostatic protection portion electrically connected to the mirror layer and located in the bezel region. The electrostatic protection portion is configured to provide electrostatic protection for the mirror layer.
Abstract:
A display substrate includes a display region and a binding region located on one side of the display region, the display region includes a display structure layer, a protective layer provided on the display structure layer and a reflective layer provided on the protective layer, and the display structure layer includes a drive structure layer, a light-emitting structure layer and an encapsulating structure layer stacked on a base; the binding region includes a binding structure layer, a protective layer provided on the binding structure layer at one side of the binding region close to the display region, and a reflective layer provided on the protective layer, and the binding structure layer includes a lead wire structure layer provided on the base, a binding pad provided on the lead wire structure layer and an inorganic encapsulating layer.