公开(公告)号：US20190115427A1

公开(公告)日：2019-04-18

申请号：US16155066

申请日：2018-10-09

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Daniel Ng ,  Lingping Guan ,  Anup Bhalla ,  Wilson Ma ,  Moses Ho ,  John Chen

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L29/08 ,  H01L29/872 ,  H01L29/861 ,  H01L29/808 ,  H01L29/737 ,  H01L29/10 ,  H01L21/306 ,  H01L29/66

CPC分类号： H01L29/0676 ,  H01L21/30625 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0696 ,  H01L29/0821 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/66893 ,  H01L29/7371 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

公开(公告)号：US10686035B2

公开(公告)日：2020-06-16

申请号：US16155066

申请日：2018-10-09

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Daniel Ng ,  Lingping Guan ,  Anup Bhalla ,  Wilson Ma ,  Moses Ho ,  John Chen

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L29/737 ,  H01L29/808 ,  H01L29/861 ,  H01L29/872 ,  H01L29/739 ,  H01L21/306 ,  H01L29/10 ,  H01L29/78

摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

公开(公告)号：US20160322459A1

公开(公告)日：2016-11-03

申请号：US14702592

申请日：2015-05-01

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Daniel Ng ,  Lingping Guan ,  Anup Bhalla ,  Wilson Ma ,  Moses Ho ,  John Chen

IPC分类号： H01L29/06 ,  H01L21/306 ,  H01L29/08 ,  H01L29/66 ,  H01L29/10

CPC分类号： H01L29/0696 ,  H01L21/30625 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/0821 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/66893 ,  H01L29/7371 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

摘要翻译： 本发明公开了一种设置在半导体衬底中的半导体功率器件，半导体衬底具有多个沟槽。 每个沟槽填充有多个交替导电类型的外延层，其构成纳米管，其功能是作为沿着侧壁方向延伸的层堆叠的导电通道，“间隙填充”层填充基本上位于其上的纳米管之间的合并间隙 每个沟渠的中心。 “间隙填料”层可以非常轻掺杂硅或生长和沉积的介电层。 在一个示例性实施例中，多个沟槽被柱柱分隔开，柱柱各自具有沟槽宽度的大约一半到三分之一的宽度。

公开(公告)号：US10121857B2

公开(公告)日：2018-11-06

申请号：US14702592

申请日：2015-05-01

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Daniel Ng ,  Lingping Guan ,  Anup Bhalla ,  Wilson Ma ,  Moses Ho ,  John Chen

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L29/78

摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

公开(公告)号：US20180240872A9

公开(公告)日：2018-08-23

申请号：US14702592

申请日：2015-05-01

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Daniel Ng ,  Lingping Guan ,  Anup Bhalla ,  Wilson Ma ,  Moses Ho ,  John Chen

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/306

CPC分类号： H01L29/0696 ,  H01L21/30625 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/0821 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/66893 ,  H01L29/7371 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

公开(公告)号：US20170288066A1

公开(公告)日：2017-10-05

申请号：US15627442

申请日：2017-06-20

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Madhur Bobde ,  Harsh Naik ,  Lingping Guan ,  Anup Bhalla ,  Sik Lui

IPC分类号： H01L29/868 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/868 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/36 ,  H01L29/402 ,  H01L29/407 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7806 ,  H01L29/7839 ,  H01L29/861 ,  H01L29/8613 ,  H01L29/8725

摘要： This invention discloses a semiconductor device disposed in a semiconductor substrate. The semiconductor device includes a first semiconductor layer of a first conductivity type on a first major surface. The semiconductor device further includes a second semiconductor layer of a second conductivity type on a second major surface opposite the first major surface. The semiconductor device further includes an injection efficiency controlling buffer layer of a first conductivity type disposed immediately below the second semiconductor layer to control the injection efficiency of the second semiconductor layer.