公开(公告)号：US08994086B2

公开(公告)日：2015-03-31

申请号：US12904313

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Hiroko Abe ,  Yukie Nemoto ,  Ryoji Nomura ,  Mikio Yukawa

发明人： Shunpei Yamazaki ,  Hiroko Abe ,  Yukie Nemoto ,  Ryoji Nomura ,  Mikio Yukawa

IPC分类号： H01L21/3205 ,  H01L21/822 ,  B82Y10/00 ,  G11C13/00 ,  G11C17/14 ,  G11C17/16 ,  G11C17/18 ,  H01L27/06 ,  H01L27/24 ,  H01L45/00 ,  H01L27/12

CPC分类号： H01L27/2463 ,  B82Y10/00 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/0069 ,  G11C17/143 ,  G11C17/16 ,  G11C17/18 ,  G11C2013/009 ,  G11C2213/77 ,  G11C2213/79 ,  H01L21/8221 ,  H01L23/66 ,  H01L27/0688 ,  H01L27/1266 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/283 ,  H01L45/06 ,  H01L45/065 ,  H01L45/1213 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/143 ,  H01L45/144 ,  H01L51/0098 ,  H01L2223/6677 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.

摘要翻译： 本发明提供了一种非易失性，易于制造并且可另外写入的半导体器件。 本发明的半导体器件包括多个晶体管，用作晶体管的源极布线或漏极布线的导电层，以及与多个晶体管之一重叠的存储元件，以及用作 天线。 存储元件包括第一导电层，有机化合物层和相变层，以及依次层叠的第二导电层。 用作天线的导电层和用作多个晶体管的源极布线或漏极布线的导电层设置在同一层上。

公开(公告)号：US07816721B2

公开(公告)日：2010-10-19

申请号：US11632049

申请日：2005-11-09

申请人： Shunpei Yamazaki ,  Hiroko Abe ,  Yukie Nemoto ,  Ryoji Nomura ,  Mikio Yukawa

发明人： Shunpei Yamazaki ,  Hiroko Abe ,  Yukie Nemoto ,  Ryoji Nomura ,  Mikio Yukawa

IPC分类号： H01L21/3205

CPC分类号： H01L27/2463 ,  B82Y10/00 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/0069 ,  G11C17/143 ,  G11C17/16 ,  G11C17/18 ,  G11C2013/009 ,  G11C2213/77 ,  G11C2213/79 ,  H01L21/8221 ,  H01L23/66 ,  H01L27/0688 ,  H01L27/1266 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/283 ,  H01L45/06 ,  H01L45/065 ,  H01L45/1213 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/143 ,  H01L45/144 ,  H01L51/0098 ,  H01L2223/6677 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.

摘要翻译： 本发明提供了一种非易失性，易于制造并且可另外写入的半导体器件。 本发明的半导体器件包括多个晶体管，用作晶体管的源极布线或漏极布线的导电层，以及与多个晶体管之一重叠的存储元件，以及用作 天线。 存储元件包括第一导电层，有机化合物层和相变层，以及依次层叠的第二导电层。 用作天线的导电层和用作多个晶体管的源极布线或漏极布线的导电层设置在同一层上。

公开(公告)号：US20080105921A1

公开(公告)日：2008-05-08

申请号：US12000593

申请日：2007-12-14

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US20120112196A1

公开(公告)日：2012-05-10

申请号：US13336292

申请日：2011-12-23

申请人： Yoshiharu HIRAKATA ,  Yukie NEMOTO

发明人： Yoshiharu HIRAKATA ,  Yukie NEMOTO

IPC分类号： H01L29/786

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US07368306B2

公开(公告)日：2008-05-06

申请号：US11347283

申请日：2006-02-06

申请人： Hideto Ohnuma ,  Yukie Nemoto

发明人： Hideto Ohnuma ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01J9/025 ,  H01J1/3044

摘要： It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity.A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.

摘要翻译： 本发明的目的是提供根据能够提高生产率的方法，通过使用便宜的大尺寸基板来形成场发射显示装置的场致发射装置的技术。 根据本发明的场发射器件包括形成在衬底的绝缘表面上的阴极电极和形成在阴极电极的表面处的凸电子发射部分，并且阴极电极和电子发射部分包括相同的半导体膜 。 电子发射部分具有圆锥形状或晶须形状。

公开(公告)号：US08399887B2

公开(公告)日：2013-03-19

申请号：US13336292

申请日：2011-12-23

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L27/108

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

公开(公告)号：US07923780B2

公开(公告)日：2011-04-12

申请号：US12000593

申请日：2007-12-14

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L27/12

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US07314784B2

公开(公告)日：2008-01-01

申请号：US10803092

申请日：2004-03-18

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： A channel-length of a TFT can be controlled with higher reproducibility, and a short channel-length of the TFT can be manufactured. Further, a structure of the TFT having an improved current-voltage characteristic is provided. A thin film transistor has a lamination layer where a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film is formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covers the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, a region which is in contact with the first insulating film and the third conductive film is a channel forming region in the semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 可以以更高的再现性来控制TFT的沟道长度，并且可以制造TFT的短沟道长度。 此外，提供了具有改善的电流 - 电压特性的TFT的结构。 薄膜晶体管具有层叠层，其中第一导电膜，第一绝缘膜和第二导电膜顺序地层叠，形成半导体膜以与层压层的侧表面接触，并且第三 导电膜通过第二绝缘膜覆盖半导体膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US20060141657A1

公开(公告)日：2006-06-29

申请号：US11347283

申请日：2006-02-06

申请人： Hideto Ohnuma ,  Yukie Nemoto

发明人： Hideto Ohnuma ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01J9/025 ,  H01J1/3044

摘要： It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity. A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.

公开(公告)号：US20110183501A1

公开(公告)日：2011-07-28

申请号：US13081525

申请日：2011-04-07

申请人： Yoshiharu HIRAKATA ,  Yukie NEMOTO

发明人： Yoshiharu HIRAKATA ,  Yukie NEMOTO

IPC分类号： H01L21/20

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。