公开(公告)号：US5523616A

公开(公告)日：1996-06-04

申请号：US328456

申请日：1994-10-25

申请人： Yasuhide Den

发明人： Yasuhide Den

IPC分类号： C23C16/54 ,  H01L21/318 ,  H01L23/31 ,  H01L21/56 ,  H01L23/29

CPC分类号： H01L23/3192 ,  H01L23/3171 ,  H01L2924/0002

摘要： In a semiconductor device having a passivation layer, the passivation layer includes a laminated configuration formed by a plurality of tight insulating layers and a plurality of coarse insulating layers alternating with the tight insulating layers.

摘要翻译： 在具有钝化层的半导体器件中，钝化层包括由多个紧密绝缘层和与紧密绝缘层交替的多个粗绝缘层形成的叠层结构。

公开(公告)号：US06617260B2

公开(公告)日：2003-09-09

申请号：US09968020

申请日：2001-10-02

申请人： Takayuki Abe ,  Yasuhide Den

发明人： Takayuki Abe ,  Yasuhide Den

IPC分类号： H01L2131

CPC分类号： H01L21/76864 ,  H01L21/3105 ,  H01L21/32051 ,  H01L21/76825 ,  H01L21/76828 ,  H01L27/10885

摘要： The present invention provides a manufacturing method of a semiconductor device which does not give rise to peeling of a metal film caused by oxygen held in a interlayer insulating film even when the wafer is subjected to a heat treatment after the metal film is formed on the interlayer insulating film. After the formation of the interlayer insulating film, oxygen held in the interlayer insulating film is removed from the interlayer insulating film, then a metal film on the interlayer insulating film.

公开(公告)号：US07393433B2

公开(公告)日：2008-07-01

申请号：US11064817

申请日：2005-02-25

申请人： Takamasa Tanikuni ,  Yasuhide Den

发明人： Takamasa Tanikuni ,  Yasuhide Den

IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306 ,  H01L21/683 ,  B23B5/22 ,  B25G3/22 ,  H01T23/00

CPC分类号： H01L21/67069 ,  C23C16/4586 ,  C23C16/507 ,  H01J37/32577 ,  H01J37/32706 ,  H01L21/6831 ,  Y10T279/23

摘要： A wiring member which becomes substantially symmetrical on the plane of an electrostatic chuck unit is connected to the tip end of an RF introduction rod between the RF introduction rod and the electrostatic chuck unit in order to make uniform generation of an electric field due to bias RF which becomes a cause of plasma damage. The connection point between the electrostatic chuck unit and the wiring member may be single or plural.

摘要翻译： 在静电吸盘单元的平面上基本上对称的配线构件连接到RF引入杆和静电吸盘单元之间的RF引入杆的前端，以便均匀地产生由于偏置RF的电场 这成为等离子体损伤的原因。 静电吸盘单元和配线构件之间的连接点可以是单个或多个。

公开(公告)号：US20050183828A1

公开(公告)日：2005-08-25

申请号：US11064817

申请日：2005-02-25

申请人： Takamasa Tanikuni ,  Yasuhide Den

发明人： Takamasa Tanikuni ,  Yasuhide Den

IPC分类号： C23C16/458 ,  C23C16/507 ,  C23C16/513 ,  C23F1/00 ,  H01L21/00 ,  H01L21/31 ,  H01L21/683

CPC分类号： H01L21/67069 ,  C23C16/4586 ,  C23C16/507 ,  H01J37/32577 ,  H01J37/32706 ,  H01L21/6831 ,  Y10T279/23

摘要： A wiring member which becomes substantially symmetrical on the plane of an electrostatic chuck unit is connected to the tip end of an RF introduction rod between the RF introduction rod and the electrostatic chuck unit in order to make uniform generation of an electric field due to bias RF which becomes a cause of plasma damage. The connection point between the electrostatic chuck unit and the wiring member may be single or plural.

摘要翻译： 在静电吸盘单元的平面上基本上对称的配线构件连接到RF引入杆和静电吸盘单元之间的RF引入杆的前端，以便均匀地产生由于偏置RF的电场 这成为等离子体损伤的原因。 静电吸盘单元和配线构件之间的连接点可以是单个或多个。

公开(公告)号：US5521126A

公开(公告)日：1996-05-28

申请号：US264159

申请日：1994-06-22

申请人： Kenji Okamura ,  Masanobu Zenke ,  Yasuhide Den

发明人： Kenji Okamura ,  Masanobu Zenke ,  Yasuhide Den

IPC分类号： H01L21/31 ,  H01L21/316 ,  H01L21/02

CPC分类号： H01L21/02164 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/31608 ,  Y10S148/025 ,  Y10S148/118

摘要： A method of fabricating a semiconductor device includes the steps of forming a wiring layer on the surface of a semiconductor substrate, depositing a silicone film on the whole surface of the semiconductor substrate including the wiring layer by a CVD method and exposing the silicone film to oxidative plasma with enhanced frequencies including components of 1 MHz or less to change to a silicon oxide film, the depositing step and exposing step being alternately repeated in the same apparatus till the silicon oxide film having any desired thickness is obtained. The resulting silicon oxide film has the smooth surface and the high density.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底的表面上形成布线层，通过CVD法在包括布线层的半导体衬底的整个表面上沉积硅酮膜，并将硅氧烷膜暴露于氧化 具有增加的频率的等离子体，包括1MHz或更小的分量以改变为氧化硅膜，沉积步骤和曝光步骤在相同的装置中交替重复，直到获得具有任何所需厚度的氧化硅膜。 得到的氧化硅膜具有光滑的表面和高密度。

公开(公告)号：US07064382B2

公开(公告)日：2006-06-20

申请号：US11074064

申请日：2005-03-08

申请人： Noriaki Kodama ,  Kohji Kanamori ,  Junichi Suzuki ,  Teiichirou Nishizaka ,  Yasuhide Den ,  Shinji Fujieda ,  Akio Toda

发明人： Noriaki Kodama ,  Kohji Kanamori ,  Junichi Suzuki ,  Teiichirou Nishizaka ,  Yasuhide Den ,  Shinji Fujieda ,  Akio Toda

IPC分类号： H01L29/788

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L29/1033 ,  H01L29/7845 ,  H01L29/7846 ,  H01L29/7881

摘要： A nonvolatile memory device includes source and drain regions formed in a semiconductor substrate, and an insulating film formed on a channel region between the source region and the drain region in the semiconductor substrate. The nonvolatile memory device also includes a dielectric film formed above the channel region to store electric charge, and a control gate formed on the dielectric film. Compressive stress in the channel region is equal to or less than 50 MPa.

摘要翻译： 非易失性存储器件包括形成在半导体衬底中的源区和漏区，以及形成在半导体衬底中的源区和漏区之间的沟道区上的绝缘膜。 非易失性存储器件还包括形成在通道区域上方以存储电荷的电介质膜，以及形成在电介质膜上的控制栅极。 通道区域的压缩应力为50MPa以下。

公开(公告)号：US20050199945A1

公开(公告)日：2005-09-15

申请号：US11074064

申请日：2005-03-08

申请人： Noriaki Kodama ,  Kohji Kanamori ,  Junichi Suzuki ,  Teiichirou Nishizaka ,  Yasuhide Den ,  Shinji Fujieda ,  Akio Toda

发明人： Noriaki Kodama ,  Kohji Kanamori ,  Junichi Suzuki ,  Teiichirou Nishizaka ,  Yasuhide Den ,  Shinji Fujieda ,  Akio Toda

IPC分类号： H01L21/8247 ,  H01L21/8239 ,  H01L27/10 ,  H01L27/105 ,  H01L27/115 ,  H01L29/10 ,  H01L29/745 ,  H01L29/76 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L29/1033 ,  H01L29/7845 ,  H01L29/7846 ,  H01L29/7881

摘要： A nonvolatile memory device includes source and drain regions formed in a semiconductor substrate, and an insulating film formed on a channel region between the source region and the drain region in the semiconductor substrate. The nonvolatile memory device also includes a dielectric film formed above the channel region to store electric charge, and a control gate formed on the dielectric film. Compressive stress in the channel region is equal to or less than 50 MPa.

摘要翻译： 非易失性存储器件包括形成在半导体衬底中的源区和漏区，以及形成在半导体衬底中的源区和漏区之间的沟道区上的绝缘膜。 非易失性存储器件还包括形成在通道区域上方以存储电荷的电介质膜，以及形成在电介质膜上的控制栅极。 通道区域的压缩应力为50MPa以下。