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    Methods for fabricating semiconductor devices using liner layers to avoid damage to underlying patterns
    1.
    发明授权
    Methods for fabricating semiconductor devices using liner layers to avoid damage to underlying patterns 有权
    使用衬里层制造半导体器件以避免损坏底层图案的方法

    公开(公告)号：US09396988B2

    公开(公告)日：2016-07-19

    申请号：US14703556

    申请日：2015-05-04

    申请人： Kyoung-Woo Lee ,  Woo-Jin Lee ,  Jong-Sam Kim ,  Woo-Kyung You ,  Young-Sang Lee ,  Min Huh

    发明人： Kyoung-Woo Lee ,  Woo-Jin Lee ,  Jong-Sam Kim ,  Woo-Kyung You ,  Young-Sang Lee ,  Min Huh

    IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/70 ,  H01L21/768

    CPC分类号： H01L21/76802 ,  H01L21/31144 ,  H01L21/76804 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76843 ,  H01L2221/1063

    摘要： A method for fabricating a semiconductor device includes sequentially forming an interlayer insulating layer and a hard mask pattern including a first opening on a substrate including a lower pattern, forming a trench exposing the lower pattern in the interlayer insulating layer using the hard mask pattern, forming a liner layer including a first part formed along sidewalls and a bottom surface of the trench and a second part formed along a top surface of the hard mask pattern, forming a sacrificial pattern exposing the second part of the liner layer in the trench, removing the second part of the liner layer and the hard mask pattern using the sacrificial pattern, and after the removing of the hard mask pattern, removing the sacrificial pattern to expose the first part of the liner layer.

    摘要翻译： 一种制造半导体器件的方法包括在包括下图案的衬底上顺序地形成层间绝缘层和包括第一开口的硬掩模图案，使用硬掩模图案形成在层间绝缘层中暴露下图案的沟槽，形成 包括沿着沟槽的侧壁和底表面形成的第一部分和沿着硬掩模图案的顶表面形成的第二部分的衬垫层，形成暴露沟槽中的衬垫层的第二部分的牺牲图案， 衬垫层的第二部分和使用牺牲图案的硬掩模图案，并且在去除硬掩模图案之后，去除牺牲图案以露出衬垫层的第一部分。

    CONNERTING STRUCTURE OF TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    CONNERTING STRUCTURE OF TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    触控面板的连接结构及其制造方法

    公开(公告)号：US20130161075A1

    公开(公告)日：2013-06-27

    申请号：US13424439

    申请日：2012-03-20

    申请人： Woo Jin LEE ,  Sang Su HONG

    发明人： Woo Jin LEE ,  Sang Su HONG

    IPC分类号： H05K1/02 ,  H05K3/00

    CPC分类号： G06F3/041 ,  G06F2203/04103 ,  H05K1/118 ,  H05K2201/055 ,  Y10T29/49155

    摘要： Disclosed herein are a connecting structure of a touch panel and a method for manufacturing the same. The connecting structure of the present invention includes a flexible film; a first electrode formed on one surface of the flexible film; a second electrode formed on the other surface of the flexible film; and a folding part extendedly formed from a side end of the flexible film to be foldably bonded to one surface of the flexible film, wherein the second electrode extends along an outer surface of the folding part so that the first electrode and the second electrode formed at the folding part are disposed on a co-plane.

    摘要翻译： 这里公开了触摸面板的连接结构及其制造方法。 本发明的连接结构包括柔性膜; 形成在柔性膜的一个表面上的第一电极; 形成在所述柔性膜的另一个表面上的第二电极; 以及折叠部，其从所述柔性膜的侧端部延伸地形成为可折叠地接合到所述柔性膜的一个表面，其中所述第二电极沿着所述折叠部的外表面延伸，使得所述第一电极和所述第二电极形成在 折叠部分设置在共面上。

    TOUCH PANEL
    7.
    发明申请
    TOUCH PANEL 审中-公开
    触控面板

    公开(公告)号：US20130021268A1

    公开(公告)日：2013-01-24

    申请号：US13252755

    申请日：2011-10-04

    申请人： Woo Jin Lee ,  Sang Su Hong ,  Jae Hun Kim ,  Chung Mo Yang ,  In Hyung Lee ,  Seul Gi Kim ,  Young Woo Lee

    发明人： Woo Jin Lee ,  Sang Su Hong ,  Jae Hun Kim ,  Chung Mo Yang ,  In Hyung Lee ,  Seul Gi Kim ,  Young Woo Lee

    IPC分类号： G06F3/041

    CPC分类号： G06F3/0416 ,  G06F3/044 ,  G06F3/045

    摘要： Disclosed herein is a touch panel, including: a base substrate divided into an active area, a bezel area surrounding the active area, and a connection area provided outside the bezel area; sensing electrodes formed in the active area; and electrode wirings connected to the sensing electrodes and extended to the connecting area. Here, a predetermined portion of the base substrate is cut and the connection area is folded by using the predetermined portion as a boundary line such that the connection area is protruded outwardly from the base substrate. According to the present invention, the connection area is provided in the base substrate in a single body, thereby allowing omission of separate flexible printed cables, and thus, an attaching process of the flexible printed cable can also be omitted.

    摘要翻译： 这里公开了一种触摸面板，包括：分为活动区域的基底基板，围绕有源区域的边框区域和设置在边框区域外部的连接区域; 形成在有源区中的感测电极; 和连接到感测电极并延伸到连接区域的电极配线。 这里，通过使用预定部分作为边界线，将基底基板的预定部分切割并且连接区域被折叠，使得连接区域从基底基板向外突出。 根据本发明，连接区域设置在单个主体中的基底基板中，从而可以省略单独的柔性印刷电缆，因此也可以省略柔性印刷电缆的连接过程。

    Semiconductor devices, a system including semiconductor devices and methods thereof
    8.
    发明申请
    Semiconductor devices, a system including semiconductor devices and methods thereof 审中-公开
    半导体器件，包括半导体器件的系统及其方法

    公开(公告)号：US20110128170A1

    公开(公告)日：2011-06-02

    申请号：US12923858

    申请日：2010-10-12

    申请人： Seung-Jun Bae ,  Seong-Jin Jang ,  Kwang-Il Park ,  Woo-Jin Lee

    发明人： Seung-Jun Bae ,  Seong-Jin Jang ,  Kwang-Il Park ,  Woo-Jin Lee

    IPC分类号： H03M7/00

    CPC分类号： H03K19/00346 ,  H04L25/03866 ,  H04L25/14 ,  H04L25/4908

    摘要： Semiconductor devices, a system including said semiconductor devices and methods thereof are provided. An example semiconductor device may receive data scheduled for transmission, scramble an order of bits within the received data, the scrambled order arranged in accordance with a given pseudo-random sequence. The received data may be balanced such that a difference between a first number of the bits within the received data equal to a first logic level and a second number of bits within the received data equal to a second logic level is below a threshold. The balanced and scrambled received data may then be transmitted. The example semiconductor device may perform the scrambling and balancing operations in any order. Likewise, on a receiving end, another semiconductor device may decode the original data by unscrambling and unbalancing the transmitted data. The unscrambling and unbalancing operations may be performed in an order based upon the order in which the transmitted data is scrambled and balanced.

    摘要翻译： 提供半导体器件，包括所述半导体器件的系统及其方法。 半导体器件的示例可以接收被调度用于发送的数据，对接收到的数据内的比特顺序进行加扰，根据给定的伪随机序列排列的加扰顺序。 所接收的数据可以是平衡的，使得等于第一逻辑电平的接收数据内的第一比特数与等于第二逻辑电平的接收数据中的第二比特数之间的差异低于阈值。 然后可以发送平衡和加扰的接收数据。 示例半导体器件可以以任何顺序执行加扰和平衡操作。 类似地，在接收端，另一个半导体器件可以通过对发送的数据进行解扰和不平衡来解码原始数据。 可以基于发送的数据被加扰和平衡的顺序以顺序执行解扰和不平衡操作。

    METHOD OF DEPOSITING DIELECTRIC FILM HAVING Si-N BONDS BY MODIFIED PEALD METHOD
    9.
    发明申请
    METHOD OF DEPOSITING DIELECTRIC FILM HAVING Si-N BONDS BY MODIFIED PEALD METHOD 有权
    通过改性PEALD方法沉积具有Si-N键的电介质膜的方法

    公开(公告)号：US20110086516A1

    公开(公告)日：2011-04-14

    申请号：US12901323

    申请日：2010-10-08

    申请人： Woo Jin Lee ,  Kuo-wei Hong ,  Akira Shimizu ,  Deakyun Jeong

    发明人： Woo Jin Lee ,  Kuo-wei Hong ,  Akira Shimizu ,  Deakyun Jeong

    IPC分类号： H01L21/318

    CPC分类号： H01L21/3185 ,  C23C16/345 ,  C23C16/4554 ,  C23C16/5096 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/3141

    摘要： A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.

    摘要翻译： 通过等离子体增强原子层沉积（PEALD）在半导体衬底上形成具有Si-N键的电介质膜的方法包括：将含氮和氢的反应气体和稀有气体引入到半导体衬底 被放置 将具有小于1.0秒持续时间脉冲的含氢硅前体引入引入反应气体和稀有气体的反应空间中; 在硅前驱物被切断之后立即以小于1.0秒持续时间的脉冲离开等离子体; 并且将反应气体和稀有气体保持为小于2.0秒持续时间的吹扫。

    METHOD OF FORMING HIGHLY CONFORMAL AMORPHOUS CARBON LAYER
    10.
    发明申请
    METHOD OF FORMING HIGHLY CONFORMAL AMORPHOUS CARBON LAYER 有权
    形成高度一致的非晶碳层的方法

    公开(公告)号：US20100291713A1

    公开(公告)日：2010-11-18

    申请号：US12467017

    申请日：2009-05-15

    申请人： Woo-Jin Lee ,  Atsuki Fukazawa

    发明人： Woo-Jin Lee ,  Atsuki Fukazawa

    IPC分类号： H01L21/66

    CPC分类号： H01L21/3146 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0337

    摘要： A method of forming a conformal amorphous hydrogenated carbon layer on an irregular surface of a semiconductor substrate includes: vaporizing a hydrocarbon-containing precursor; introducing the vaporized precursor and an argon gas into a CVD reaction chamber inside which the semiconductor substrate is placed; depositing a conformal amorphous hydrogenated carbon layer on the irregular surface of the semiconductor substrate by plasma CVD; and controlling the deposition of the conformal ratio of the depositing conformal amorphous hydrogenated carbon layer. The controlling includes (a) adjusting a step coverage of the conformal amorphous hydrogenated carbon layer to about 30% or higher as a function of substrate temperature, and (b) adjusting a conformal ratio of the conformal amorphous hydrogenated carbon layer to about 0.9 to about 1.1 as a function of RF power and/or argon gas flow rate,

    摘要翻译： 在半导体衬底的不规则表面上形成共形无定形氢化碳层的方法包括：使含烃前体气化; 将蒸发的前体和氩气引入其中放置半导体衬底的CVD反应室; 通过等离子体CVD在半导体衬底的不规则表面上沉积共形无定形氢化碳层; 并控制沉积的共形无定形氢化碳层的共形比的沉积。 控制包括（a）将保形无定形氢化碳层的台阶覆盖率调整为基板温度的函数为约30％或更高，和（b）调整共形无定形氢化碳层的共形比为约0.9至约 1.1作为RF功率和/或氩气流量的函数，