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    METHOD OF PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法和半导体器件

    公开(公告)号：US20120104502A1

    公开(公告)日：2012-05-03

    申请号：US13260948

    申请日：2010-03-24

    申请人： Toru Imori ,  Junichi Ito ,  Hajime Momoi ,  Tomohiro Shibata ,  Shuji Ikeda

    发明人： Toru Imori ,  Junichi Ito ,  Hajime Momoi ,  Tomohiro Shibata ,  Shuji Ikeda

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7839 ,  H01L21/28537 ,  H01L29/0653 ,  H01L29/66636 ,  H01L29/66643

    摘要： Disclosed is a method of producing a semiconductor device, able to form a source/drain of a Schottky junction (FET) with simple steps and able to improve the device characteristics. A gate is formed on an element region defined in a silicon substrate layer by element isolation regions (first step), the silicon substrate is etched by self-alignment using the gate and the element isolation regions as masks (second step), and an insulating film is formed on the side surfaces of the gate (third step). Then, a metal film acting as the source/drain is selectively formed on the etching region of the silicon substrate by electroless plating (fourth step).

    摘要翻译： 公开了一种制造能够以简单的步骤形成肖特基结（FET）的源极/漏极并能够改善器件特性的半导体器件的方法。 栅极通过元件隔离区域形成在限定在硅衬底层中的元件区域上（第一步骤），使用栅极和元件隔离区域作为掩模通过自对准蚀刻硅衬底（第二步骤），并且绝缘 在栅极的侧面上形成膜（第三工序）。 然后，通过无电镀在硅衬底的蚀刻区域上选择性地形成用作源极/漏极的金属膜（第四步骤）。

    SILVER ELECTROPLATED AND/OR SILVER ALLOY ELECTROPLATED ARTICLE HAVING AN OXIDATION LAYER ON ITS SURFACE
    3.
    发明申请
    SILVER ELECTROPLATED AND/OR SILVER ALLOY ELECTROPLATED ARTICLE HAVING AN OXIDATION LAYER ON ITS SURFACE 审中-公开
    在其表面上具有氧化层的银电镀和/或银合金电镀物品

    公开(公告)号：US20120097545A1

    公开(公告)日：2012-04-26

    申请号：US13380946

    申请日：2011-05-18

    申请人： Toru Imori ,  Takashi Kinase ,  Ryusuke Oka

    发明人： Toru Imori ,  Takashi Kinase ,  Ryusuke Oka

    IPC分类号： B32B15/04 ,  C23C28/00 ,  C25D7/00

    CPC分类号： C23C28/023 ,  C23C22/60 ,  C23C28/321 ,  C23C28/345 ,  C25D3/46 ,  C25D3/64 ,  G02B5/0808 ,  H01L33/60

    摘要： The object of the present invention is to provide a silver plated and/or a silver alloy plated article with high productivity, high reflectance in the visible light range, and excellent sulfidizing resistance. The present invention provides a silver electroplated and/or silver alloy electroplated article having an oxidation layer on its surface, wherein a silver plating layer and/or silver alloy plating layer is formed on a substrate by silver electroplating and/or silver alloy electroplating, and then subjected to oxidation treatment to form an oxidation layer on the surface thereof. The thickness of the oxidation layer formed on the surface of the plating layer is 0.05 μm or more.

    摘要翻译： 本发明的目的是提供具有高生产率，可见光范围内的高反射率和优异的耐硫化性的镀银和/或银合金镀层制品。 本发明提供了一种在其表面上具有氧化层的银电镀和/或银合金电镀制品，其中通过银电镀和/或银合金电镀在基板上形成银镀层和/或银合金镀层，以及 然后进行氧化处理以在其表面上形成氧化层。 形成在镀层表面上的氧化层的厚度为0.05μm以上。

    ULSI MICRO-INTERCONNECT MEMBER HAVING RUTHENIUM ELECTROPLATING LAYER ON BARRIER LAYER
    5.
    发明申请
    ULSI MICRO-INTERCONNECT MEMBER HAVING RUTHENIUM ELECTROPLATING LAYER ON BARRIER LAYER 有权
    ULSI微型互连成员，具有在屏障层上的电镀层

    公开(公告)号：US20100314766A1

    公开(公告)日：2010-12-16

    申请号：US12735187

    申请日：2009-01-08

    申请人： Junnosuke Sekiguchi ,  Toru Imori ,  Takashi Kinase

    发明人： Junnosuke Sekiguchi ,  Toru Imori ,  Takashi Kinase

    IPC分类号： H01L23/48 ,  H01L21/4763

    CPC分类号： H01L23/53238 ,  C23C28/021 ,  C23C28/023 ,  C25D3/38 ,  C25D3/50 ,  C25D5/10 ,  H01L21/2885 ,  H01L21/76846 ,  H01L21/76873 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An object of the present is to provide a ULSI micro-interconnect member having a seed layer which, particularly on the inner sidewalls of vias and trenches, is formed with a sufficient coverage and a film thickness uniform with that on surface portion, and which has a low level of impurities. Further objects of the invention are to provide a ULSI micro-interconnect member in which, by utilizing such a seed layer to subsequently effect copper electroplating, micro-interconnects have been formed without generating voids; a process for forming the same; and a semiconductor wafer in which such ULSI micro-interconnects have been formed. A ULSI micro-interconnect member having a substrate and a ULSI micro-interconnect formed on the substrate, wherein the ULSI micro-interconnect includes a barrier layer formed on the substrate and a ruthenium electroplating layer formed on the barrier layer; the ULSI micro-interconnect member further including a copper electroplating layer formed using the ruthenium electroplating layer as a seed layer; and a process for fabricating the ULSI micro-interconnect members.

    摘要翻译： 本发明的目的是提供一种具有种子层的ULSI微互连构件，其特别地在通孔和沟槽的内侧壁上形成有足够的覆盖层，并且膜表面部分具有均匀的膜厚度， 杂质含量低。 本发明的另外的目的是提供一种ULSI微互连构件，其中通过利用这种种子层来随后实现铜电镀，已经形成微互连而不产生空隙; 其形成方法; 以及其中已经形成这种ULSI微互连的半导体晶片。 ULSI微互连构件，其具有形成在基板上的基板和ULSI微互连，其中ULSI微互连包括形成在基板上的阻挡层和形成在阻挡层上的钌电镀层; 所述ULSI微互连构件还包括使用所述钌电镀层作为种子层形成的铜电镀层; 以及制造ULSI微互连部件的工艺。

    Metallic powder for powder metallurgy whose main component is iron and iron-based sintered body
    6.
    发明授权
    Metallic powder for powder metallurgy whose main component is iron and iron-based sintered body 有权
    粉末冶金用金属粉末，主要成分为铁和铁基烧结体

    公开(公告)号：US07666245B2

    公开(公告)日：2010-02-23

    申请号：US11574294

    申请日：2005-08-05

    申请人： Toru Imori ,  Atsushi Nakamura ,  Yasushi Narusawa ,  Masataka Yahagi

    发明人： Toru Imori ,  Atsushi Nakamura ,  Yasushi Narusawa ,  Masataka Yahagi

    IPC分类号： B22F3/10 ,  B22F1/00

    CPC分类号： C22C33/0207 ,  B22F2998/00 ,  B22F2999/00 ,  C22C33/0264 ,  B22F3/10 ,  B22F2201/013

    摘要： Provided is iron-based metal powder for powder metallurgy including a metallic soap containing at least one or more types of metal selected from a group of Ag, Au, Bi, Co, Cu, Mo, Ni, Pd, Pt, Sn and Te having a higher standard oxidization potential than iron, and an additional metal which forms a liquid phase at a temperature of 1200° C. or less in the combination with the metal, wherein the soap contains metal for forming an alloy phase between the two. As a result, obtained is mixed powder for powder metallurgy capable of improving the rust prevention effect easily without having to hardly change the conventional processes.

    摘要翻译： 本发明提供一种粉末冶金用铁系金属粉末，其含有含有选自Ag，Au，Bi，Co，Cu，Mo，Ni，Pd，Pt，Sn和Te中的至少一种以上的金属的金属皂，其具有 比铁更高的标准氧化电位，以及与金属组合，在1200℃以下的温度下形成液相的附加金属，其中所述皂含有用于在两者之间形成合金相的金属。 结果，得到了能够容易地提高防锈效果的粉末冶金用混合粉末，而不用几乎不改变常规方法。

    Resin Substrate Material, Electronic Component Substrate Material Manufactured by Electroless Plating on the Same, and Method for Manufacturing Electronic Component Substrate Material
    8.
    发明申请
    Resin Substrate Material, Electronic Component Substrate Material Manufactured by Electroless Plating on the Same, and Method for Manufacturing Electronic Component Substrate Material 有权
    树脂基板材料，通过无电镀制造的电子部件基板材料及其制造电子部件基板材料的方法

    公开(公告)号：US20080138629A1

    公开(公告)日：2008-06-12

    申请号：US11795355

    申请日：2006-02-27

    申请人： Toshifumi Kawamura ,  Toru Imori

    发明人： Toshifumi Kawamura ,  Toru Imori

    IPC分类号： B32B15/08 ,  C23C18/31

    CPC分类号： C23C18/2066 ,  C23C18/30 ,  C23C18/31 ,  C23C18/40 ,  H05K3/181 ,  H05K3/389 ,  H05K3/4661 ,  Y10T428/31511 ,  Y10T428/31522 ,  Y10T428/31529 ,  Y10T428/31663 ,  Y10T428/31678 ,  Y10T428/31721

    摘要： There is provided a technology that can be applied as a substrate material to ordinary resin substrate materials and allows the adhesive strength between this substrate material and a plating metal layer to be increased; more specifically, there is provided an ordinary resin substrate material with an increased adhesive strength between the substrate material and a plating metal layer. The present invention relates to a resin substrate material such as an epoxy resin whose surface is swellable in a solution containing imidazolesilane and a palladium or other noble metal compound having a catalytic action in electroless plating and which has been surface-treated with the solution, and to an electronic component substrate material manufactured by performing electroless plating on this resin substrate material.

    摘要翻译： 提供了可用作普通树脂基板材料的基板材料的技术，并且允许该基板材料和电镀金属层之间的粘合强度增加; 更具体地，提供了在基板材料和电镀金属层之间具有增加的粘合强度的普通树脂基板材料。 本发明涉及一种树脂基板材料，例如环氧树脂，其表面在包含咪唑烷的溶液中可膨胀，并且具有在化学镀中具有催化作用的钯或其它贵金属化合物，并且已经用溶液进行了表面处理， 涉及通过在该树脂基板材料上进行无电解电镀制造的电子部件基板材料。

    Iron-based sintered compact and method for production thereof
    9.
    发明授权
    Iron-based sintered compact and method for production thereof 有权
    铁基烧结体及其制造方法

    公开(公告)号：US07347969B2

    公开(公告)日：2008-03-25

    申请号：US10526295

    申请日：2003-09-01

    申请人： Masataka Yahagi ,  Toru Imori ,  Atsushi Nakamura

    发明人： Masataka Yahagi ,  Toru Imori ,  Atsushi Nakamura

    IPC分类号： B22F3/10 ,  C22C38/00

    CPC分类号： C22C33/0264 ,  B22F3/1007 ,  B22F2999/00 ,  B32B15/013 ,  C22C33/02 ,  Y10T428/12014 ,  Y10T428/12479 ,  Y10T428/12951 ,  Y10T428/12993 ,  B22F2201/40

    摘要： Provided is an iron-based sintered body with a rustproof function comprising a layer containing 0.01 to 5 at % of indium on the surface of the iron-based sintered body, or an iron-based sintered body with a rustproof function containing 0.01 to 5 at % of indium throughout the sintered body, and the iron-based sintered body having iron as its principal component is manufactured by performing sintering in a gas atmosphere containing indium vapor or indium. Thereby obtained is an iron-based sintered body, as well as the manufacturing method thereof, capable of easily improving the rustproof effect without having to hardly change the conventional process.

    摘要翻译： 本发明提供一种具有防锈功能的铁基烧结体，该铁基烧结体包括在铁基烧结体的表面上含有0.01〜5原子％的铟的层或具有防锈功能的铁基烧结体，其含有0.01〜5at 通过在含有铟蒸气或铟的气体气氛中进行烧结来制造以铁为主要成分的铁基烧结体， 由此得到的铁基烧结体及其制造方法能够容易地提高防锈效果，而不需要改变常规工艺。