公开(公告)号：US08809862B2

公开(公告)日：2014-08-19

申请号：US12909393

申请日：2010-10-21

Applicant: Tamae Takano ,  Atsuo Isobe

Inventor： Tamae Takano ,  Atsuo Isobe

IPC: H01L29/04

CPC classification number: H01L29/78606 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L29/0603 ,  H01L29/78609 ,  H01L29/78636

Abstract: The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode generated by a break or thin thickness of a gate insulating film in an end portion of a channel region of the semiconductor film, and the manufacturing method of the semiconductor device. Plural thin film transistors which each have semiconductor film provided over a substrate continuously, conductive films provided over the semiconductor film through a gate insulating film, source and drain regions provided in the semiconductor film which are not overlapped with the conductive films, and channel regions provided in the semiconductor film existing under the conductive films and between the source and drain regions. And impurity regions provided in the semiconductor film which is not overlapped with the conductive film and provided adjacent to the source and drain regions. Further, the conductive films are provided over the channel regions and regions of the semiconductor film which are provided adjacent to the channel regions.

Abstract translation: 本发明提供一种半导体器件，其抑制由半导体膜的沟道区域的端部中的栅极绝缘膜的断裂或薄的厚度产生的半导体膜和栅电极之间的短路和漏电流，以及 半导体器件的制造方法。 连续地设置在基板上的半导体膜的多个薄膜晶体管，通过栅极绝缘膜设置在半导体膜上的导电膜，设置在半导体膜中的不与导电膜重叠的源区和漏区，以及设置的沟道区 在存在于导电膜之下以及源极和漏极区之间的半导体膜中。 以及设置在半导体膜中的不与导电膜重叠并且设置在源极和漏极区附近的杂质区。 此外，导电膜设置在与沟道区相邻设置的半导体膜的沟道区域和区域之上。

公开(公告)号：US08604547B2

公开(公告)日：2013-12-10

申请号：US11795476

申请日：2006-02-07

Applicant: Mikio Yukawa ,  Tamae Takano ,  Yoshinobu Asami ,  Shunpei Yamazaki ,  Takehisa Sato

Inventor： Mikio Yukawa ,  Tamae Takano ,  Yoshinobu Asami ,  Shunpei Yamazaki ,  Takehisa Sato

IPC: H01L27/12 ,  H01L21/70

CPC classification number: H01L27/112 ,  G11C17/146 ,  G11C17/16

Abstract: It is an object of the present invention to provide a nonvolatile memory device, in which additional writing is possible other than in manufacturing and forgery and the like due to rewriting can be prevented, and a semiconductor device having the memory device. It is another object of the present invention to provide an inexpensive and nonvolatile memory device with high reliability and a semiconductor device. According to one feature of the present invention, a memory device includes a first conductive layer formed over an insulating surface, a second conductive layer, a first insulating layer interposed between the first conductive layer and the second conductive layer, and a second insulating layer which covers a part of the first conductive layer, wherein the first insulating layer covers an edge portion of the first conductive layer, the insulating surface, and the second insulating layer.

Abstract translation: 本发明的一个目的是提供一种非易失性存储器件，其中可以除了制造和伪造等以外的其他写入可能被改写，以及具有存储器件的半导体器件。 本发明的另一个目的是提供一种具有高可靠性的廉价且非易失性的存储器件和半导体器件。 根据本发明的一个特征，一种存储器件包括：在绝缘表面上形成的第一导电层，第二导电层，介于第一导电层和第二导电层之间的第一绝缘层;以及第二绝缘层， 覆盖第一导电层的一部分，其中第一绝缘层覆盖第一导电层，绝缘表面和第二绝缘层的边缘部分。

公开(公告)号：US08581332B2

公开(公告)日：2013-11-12

申请号：US13207450

申请日：2011-08-11

Applicant: Tamae Takano ,  Tetsuya Kakehata ,  Shunpei Yamazaki

Inventor： Tamae Takano ,  Tetsuya Kakehata ,  Shunpei Yamazaki

IPC: H01L29/792

CPC classification number: H01L27/1157 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/13 ,  H01L29/4234 ,  H01L29/792 ,  H01L29/7923

Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.

公开(公告)号：US08526216B2

公开(公告)日：2013-09-03

申请号：US13546013

申请日：2012-07-11

Applicant: Yoshinobu Asami ,  Tamae Takano ,  Masayuki Sakakura ,  Ryoji Nomura ,  Shunpei Yamazaki

Inventor： Yoshinobu Asami ,  Tamae Takano ,  Masayuki Sakakura ,  Ryoji Nomura ,  Shunpei Yamazaki

IPC: G11C11/34 ,  G11C11/00 ,  H01L29/12

CPC classification number: H01L27/1082 ,  B82Y10/00 ,  G11C11/34 ,  G11C13/0014 ,  G11C2213/79 ,  H01L23/4828 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1244 ,  H01L27/28 ,  H01L29/458 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

公开(公告)号：US08242988B2

公开(公告)日：2012-08-14

申请号：US12915086

申请日：2010-10-29

Applicant: Shunpei Yamazaki ,  Masayuki Sakakura ,  Mitsuaki Osame ,  Takashi Hamada ,  Tamae Takano ,  Yu Yamazaki ,  Aya Anzai

Inventor： Shunpei Yamazaki ,  Masayuki Sakakura ,  Mitsuaki Osame ,  Takashi Hamada ,  Tamae Takano ,  Yu Yamazaki ,  Aya Anzai

IPC: G09G3/30

CPC classification number: H01L27/1214 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233 ,  H01L27/3262 ,  H01L2251/5323

Abstract: A light emitting device comprising a light emitting element and a first transistor and a second transistor controlling current to be supplied to the light emitting element in a pixel; the first transistor is normally-on; the second transistor is normally-off; a channel length of the first transistor is longer than a channel width thereof; a channel length of the second transistor is equal to or shorter than a channel length thereof; gate electrodes of the first transistor and the second transistor are connected to each other; the first transistor and the second transistor have the same polarity; and the light emitting element, the first transistor and the second transistor are all connected in series.

Abstract translation: 一种发光器件，包括发光元件和第一晶体管，以及第二晶体管，控制要在像素中提供给所述发光元件的电流; 第一个晶体管正常工作; 第二晶体管正常断开; 第一晶体管的沟道长度比沟道宽度长; 第二晶体管的沟道长度等于或短于其沟道长度; 第一晶体管和第二晶体管的栅电极彼此连接; 第一晶体管和第二晶体管具有相同的极性; 并且发光元件，第一晶体管和第二晶体管都全部串联连接。

公开(公告)号：US20110031561A1

公开(公告)日：2011-02-10

申请号：US12909393

申请日：2010-10-21

Applicant: Tamae TAKANO ,  Atsuo ISOBE

Inventor： Tamae TAKANO ,  Atsuo ISOBE

IPC: H01L29/786

CPC classification number: H01L29/78606 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L29/0603 ,  H01L29/78609 ,  H01L29/78636

Abstract: The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode generated by a break or thin thickness of a gate insulating film in an end portion of a channel region of the semiconductor film, and the manufacturing method of the semiconductor device. Plural thin film transistors which each have semiconductor film provided over a substrate continuously, conductive films provided over the semiconductor film through a gate insulating film, source and drain regions provided in the semiconductor film which are not overlapped with the conductive films, and channel regions provided in the semiconductor film existing under the conductive films and between the source and drain regions. And impurity regions provided in the semiconductor film which is not overlapped with the conductive film and provided adjacent to the source and drain regions. Further, the conductive films are provided over the channel regions and regions of the semiconductor film which are provided adjacent to the channel regions.

Abstract translation: 本发明提供一种半导体器件，其抑制由半导体膜的沟道区域的端部中的栅极绝缘膜的断裂或薄的厚度产生的半导体膜和栅电极之间的短路和漏电流，以及 半导体器件的制造方法。 连续地设置在基板上的半导体膜的多个薄膜晶体管，通过栅极绝缘膜设置在半导体膜上的导电膜，设置在半导体膜中的不与导电膜重叠的源区和漏区，以及设置的沟道区 在存在于导电膜之下以及源极和漏极区之间的半导体膜中。 以及设置在半导体膜中的不与导电膜重叠并且设置在源极和漏极区附近的杂质区。 此外，导电膜设置在与沟道区相邻设置的半导体膜的沟道区域和区域之上。

公开(公告)号：US07589698B2

公开(公告)日：2009-09-15

申请号：US10801542

申请日：2004-03-17

Applicant: Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Tamae Takano ,  Takashi Hamada

Inventor： Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Tamae Takano ,  Takashi Hamada

IPC: G09G3/30

CPC classification number: H01L29/78696 ,  H01L27/1296

Abstract: When an electrical characteristic of the TFT varies, display unevenness such as brightness unevenness or gradation unevenness is occurred in a display image. According to the present invention, a display device in which variation of an electrical characteristic of a TFT is reduced, and display unevenness is reduced is provided. To obtain the display device, the fluctuation ratio of ON current value in a saturation region of adjacent TFTs is set to be equal to or less than ±12% in a TFT array substrate in which a plurality of TFTs are arranged.

Abstract translation: 当TFT的电特性变化时，在显示图像中发生诸如亮度不均匀或灰度不匀的显示不均匀。 根据本发明，提供了一种其中TFT的电特性的变化减小并且显示不均匀性减小的显示装置。 为了获得显示装置，在布置多个TFT的TFT阵列基板中，将相邻TFT的饱和区域中的导通电流值的波动比设定为±12％以下。

公开(公告)号：US20080070352A1

公开(公告)日：2008-03-20

申请号：US11978585

申请日：2007-10-30

Applicant: Akihisa Shimomura ,  Osamu Nakamura ,  Tatsuya Arao ,  Hidekazu Miyairi ,  Atsuo Isobe ,  Tamae Takano ,  Kouki Inoue

Inventor： Akihisa Shimomura ,  Osamu Nakamura ,  Tatsuya Arao ,  Hidekazu Miyairi ,  Atsuo Isobe ,  Tamae Takano ,  Kouki Inoue

IPC: H01L21/84

CPC classification number: H01L21/02683 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

Abstract: An impurity of one conductivity type is ionized and accelerated by electric field before being implanted into a semiconductor layer to form a high concentration impurity region near its surface. Then the semiconductor layer is irradiated with continuous wave laser light for melting and crystallization or recrystallization, through which a region where the concentration of the impurity is constant is formed in the semiconductor layer. The continuous wave laser light irradiation may bring the semiconductor layer to the crystalline phase from the amorphous phase as long as the impurity element is re-distributed. The impurity is segregated through this process to newly create a high concentration region. However, this region is removed and no problem arises.

公开(公告)号：US07329594B2

公开(公告)日：2008-02-12

申请号：US10607542

申请日：2003-06-27

Applicant: Akihisa Shimomura ,  Osamu Nakamura ,  Tatsuya Arao ,  Hidekazu Miyairi ,  Atsuo Isobe ,  Tamae Takano ,  Kouki Inoue

Inventor： Akihisa Shimomura ,  Osamu Nakamura ,  Tatsuya Arao ,  Hidekazu Miyairi ,  Atsuo Isobe ,  Tamae Takano ,  Kouki Inoue

IPC: H01L21/425

CPC classification number: H01L21/02683 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

Abstract: An impurity of one conductivity type is ionized and accelerated by electric field before being implanted into a semiconductor layer to form a high concentration impurity region near its surface. Then the semiconductor layer is irradiated with continuous wave laser light for melting and crystallization or recrystallization, through which a region where the concentration of the impurity is constant is formed in the semiconductor layer. The continuous wave laser light irradiation may bring the semiconductor layer to the crystalline phase from the amorphous phase as long as the impurity element is re-distributed. The impurity is segregated through this process to newly create a high concentration region. However, this region is removed and no problem arises.

Abstract translation: 一种导电类型的杂质在被注入半导体层之前被电场电离和加速，以在其表面附近形成高浓度杂质区。 然后用连续波激光照射半导体层进行熔融和结晶或再结晶，半导体层中形成杂质浓度恒定的区域。 只要杂质元素被重新分布，连续波激光照射可以使半导体层从非晶相进入结晶相。 通过该过程将杂质分离，以产生新的高浓度区域。 然而，该区域被移除并且没有问题出现。

公开(公告)号：US07326961B2

公开(公告)日：2008-02-05

申请号：US11107822

申请日：2005-04-18

Applicant: Shunpei Yamazaki ,  Atsuo Isobe ,  Tamae Takano ,  Hidekazu Miyairi

Inventor： Shunpei Yamazaki ,  Atsuo Isobe ,  Tamae Takano ,  Hidekazu Miyairi

IPC: H01L29/72

CPC classification number: H01L21/02691 ,  H01L21/02678 ,  H01L21/02683 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1281

Abstract: To provide devices relating to a manufacturing method for a semiconductor device using a laser crystallization method, which is capable of reducing a cost involved in a design change, preventing a grain boundary from developing in a channel formation region of a TFT, and preventing a remarkable reduction in mobility of the TFT, a decrease in an ON current, and an increase in an OFF current due to the grain boundary and to a semiconductor device formed by using the manufacturing method. In a semiconductor device according to the present invention, among a plurality of TFTs formed on a base film, some TFTs are electrically connected to form logic elements. The plurality of logic elements are used to form a circuit. The base film has a plurality of projective portions having a rectangular or stripe shape. Island-like semiconductor films included in each of the plurality of TFTs are formed between the plurality of projective portions and also, are crystallized by a laser light scanned in a longitudinal direction of the projective portions.

Abstract translation: 为了提供与使用激光结晶法的半导体器件的制造方法相关的装置，其能够降低设计变化中涉及的成本，防止晶界在TFT的沟道形成区域中发展，并且防止显着 TFT的迁移率的降低，导通电流的降低以及由于晶界引起的关断电流的增加以及通过使用该制造方法形成的半导体器件。 在根据本发明的半导体器件中，在形成在基膜上的多个TFT中，一些TFT电连接形成逻辑元件。 多个逻辑元件用于形成电路。 基膜具有多个具有矩形或条状的突出部分。 包含在多个TFT中的多个TFT中的岛状半导体膜形成在多个投影部之间，并且通过沿着投影部的纵向扫描的激光而结晶化。