公开(公告)号：US20090246922A1

公开(公告)日：2009-10-01

申请号：US12056277

申请日：2008-03-27

Applicant: Meng-Yi Wu ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Kun-Hsien Lee ,  Li-Shian Jeng ,  Shih-Jung Tu ,  Yu-Ming Lin ,  Yao-Chin Cheng

Inventor： Meng-Yi Wu ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Kun-Hsien Lee ,  Li-Shian Jeng ,  Shih-Jung Tu ,  Yu-Ming Lin ,  Yao-Chin Cheng

IPC: H01L21/8238

CPC classification number: H01L21/823814 ,  H01L21/823807 ,  H01L29/7848

Abstract: A method of forming CMOS transistor is disclosed. A CMOS transistor having a first active area and a second active area is provided. In order to maintain the concentration of the dopants in the second active area, according to the method of the present invention an ion implantation process is performed to form a lightly doped drain (LDD) in the second active area after an epitaxial layer is formed in the first active area. On the other hand, the ion implantation process is performed to form the respective LDD of the first active area and the second active area. After the epitaxial layer in the first active area is formed, another ion implantation process is performed to implant dopants into the LDD of the second active area again.

Abstract translation: 公开了一种形成CMOS晶体管的方法。 提供具有第一有源区和第二有源区的CMOS晶体管。 为了保持第二有源区中掺杂剂的浓度，根据本发明的方法，在形成外延层之后，在第二有源区中进行离子注入工艺以形成轻掺杂漏极（LDD） 第一个活跃区域。 另一方面，进行离子注入处理，以形成第一有源区和第二有源区的相应LDD。 在形成第一有源区中的外延层之后，再次执行另一种离子注入工艺以将掺杂剂注入到第二有源区的LDD中。

公开(公告)号：US07875520B2

公开(公告)日：2011-01-25

申请号：US12056277

申请日：2008-03-27

Applicant: Meng-Yi Wu ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Kun-Hsien Lee ,  Li-Shian Jeng ,  Shih-Jung Tu ,  Yu-Ming Lin ,  Yao-Chin Cheng

Inventor： Meng-Yi Wu ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Kun-Hsien Lee ,  Li-Shian Jeng ,  Shih-Jung Tu ,  Yu-Ming Lin ,  Yao-Chin Cheng

IPC: H01L21/336

CPC classification number: H01L21/823814 ,  H01L21/823807 ,  H01L29/7848

Abstract: A method of forming CMOS transistor is disclosed. A CMOS transistor having a first active area and a second active area is provided. In order to maintain the concentration of the dopants in the second active area, according to the method of the present invention an ion implantation process is performed to form a lightly doped drain (LDD) in the second active area after an epitaxial layer is formed in the first active area. On the other hand, the ion implantation process is performed to form the respective LDD of the first active area and the second active area. After the epitaxial layer in the first active area is formed, another ion implantation process is performed to implant dopants into the LDD of the second active area again.

Abstract translation: 公开了一种形成CMOS晶体管的方法。 提供具有第一有源区和第二有源区的CMOS晶体管。 为了保持第二有源区中的掺杂剂的浓度，根据本发明的方法，在形成外延层之后，在第二有源区中进行离子注入工艺以形成轻掺杂漏极（LDD） 第一个活跃区域。 另一方面，进行离子注入处理，以形成第一有源区和第二有源区的相应LDD。 在形成第一有源区中的外延层之后，再次执行另一种离子注入工艺以将掺杂剂注入到第二有源区的LDD中。

公开(公告)号：US20090186475A1

公开(公告)日：2009-07-23

申请号：US12017065

申请日：2008-01-21

Applicant: Shyh-Fann Ting ,  Cheng-Tung Huang ,  Shih-Chieh Hsu ,  Chih-Chiang Wu ,  Meng-Yi Wu ,  Li-Shian Jeng ,  Chung-Min Shih ,  Kun-Hsien Lee ,  Wen-Han Hung ,  Yao-Chin Cheng ,  Chi-Sheng Tseng ,  Yu-Ming Lin ,  Shih-Jung Tu ,  Tzyy-Ming Cheng

Inventor： Shyh-Fann Ting ,  Cheng-Tung Huang ,  Shih-Chieh Hsu ,  Chih-Chiang Wu ,  Meng-Yi Wu ,  Li-Shian Jeng ,  Chung-Min Shih ,  Kun-Hsien Lee ,  Wen-Han Hung ,  Yao-Chin Cheng ,  Chi-Sheng Tseng ,  Yu-Ming Lin ,  Shih-Jung Tu ,  Tzyy-Ming Cheng

IPC: H01L21/3205

CPC classification number: H01L21/28123 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636

Abstract: A method of manufacturing a MOS transistor, in which, a tri-layer photo resist layer is used to form a patterned hard mask layer having a sound shape and a small size, and the patterned hard mask layer is used to form a gate. Thereafter, by forming and defining a cap layer, a recess is formed through etching in the substrate. The patterned hard mask is removed after epitaxial layers are formed in the recesses. Accordingly, a conventional poly bump issue and an STI oxide loss issue leading to contact bridge can be avoided.

Abstract translation: 一种制造MOS晶体管的方法，其中使用三层光致抗蚀剂层来形成具有声音形状和小尺寸的图案化硬掩模层，并且使用图案化的硬掩模层来形成栅极。 此后，通过形成和限定盖层，通过在衬底中的蚀刻形成凹陷。 在凹槽中形成外延层之后去除图案化的硬掩模。 因此，可以避免导致接触桥的常规多晶块问题和STI氧化物损耗问题。