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1.
公开(公告)号:US07776642B2
公开(公告)日:2010-08-17
申请号:US12120933
申请日:2008-05-15
Applicant: Mark A. Eriksson , Max G. Lagally , Arnold Melvin Kiefer
Inventor: Mark A. Eriksson , Max G. Lagally , Arnold Melvin Kiefer
IPC: H01L21/00
CPC classification number: H01S5/3402 , B82Y20/00 , H01L31/035254 , H01S5/021 , H01S5/3407 , H01S5/3427 , Y10S438/962
Abstract: A quantum-well photoelectric device, such as a quantum cascade laser, is constructed of monocrystalline nanoscale membranes physically removed from a substrate and mechanically assembled into a stack.
Abstract translation: 诸如量子级联激光器的量子阱光电器件由从基片物理移除并机械组装成叠层的单晶纳米级膜构成。
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公开(公告)号:US07645933B2
公开(公告)日:2010-01-12
申请号:US11070834
申请日:2005-03-02
Applicant: Todd R. Narkis , Matt S. Marcus , Max G. Lagally , Mark A. Eriksson
Inventor: Todd R. Narkis , Matt S. Marcus , Max G. Lagally , Mark A. Eriksson
CPC classification number: H01L31/07 , B82Y10/00 , H01L51/0048 , H01L51/4206 , H01L51/444 , Y02E10/549 , Y02P70/521
Abstract: Carbon nanotube Schottky barrier photovoltaic cells and methods and apparatus for making the cells are provided. The photovoltaic cells include at least one contact made from a first contact material, at least one contact made from a second contact material and a plurality of photoconducting carbon nanotubes bridging the contacts. A Schottky barrier is formed at the interface between the first contact material and the carbon nanotubes while at the interface between the second contact material and the carbon nanotubes, a Schottky barrier for the opposite carrier is formed, or a small, or no Schottky barrier is formed. It is the Schottky barrier asymmetry that allows the photo-excited electron-hole pairs to escape from the carbon nanotube device.
Abstract translation: 提供碳纳米管肖特基势垒光伏电池以及用于制造电池的方法和装置。 光伏电池包括由第一接触材料制成的至少一个触点,由第二触点材料制成的至少一个触点和桥接触点的多个光导碳纳米管。 在第一接触材料和碳纳米管之间的界面处形成肖特基势垒,而在第二接触材料和碳纳米管之间的界面处,形成用于相反载体的肖特基势垒,或者小的或不具有肖特基势垒 形成。 肖特基势垒不对称性允许光激发的电子 - 空穴对从碳纳米管器件逸出。
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3.
公开(公告)号:US20090283749A1
公开(公告)日:2009-11-19
申请号:US12120933
申请日:2008-05-15
Applicant: Mark A. Eriksson , Max G. Lagally , Arnold Melvin Kiefer
Inventor: Mark A. Eriksson , Max G. Lagally , Arnold Melvin Kiefer
CPC classification number: H01S5/3402 , B82Y20/00 , H01L31/035254 , H01S5/021 , H01S5/3407 , H01S5/3427 , Y10S438/962
Abstract: A quantum-well photoelectric device, such as a quantum cascade laser, is constructed of monocrystalline nanoscale membranes physically removed from a substrate and mechanically assembled into a stack.
Abstract translation: 诸如量子级联激光器的量子阱光电器件由从基片物理移除并机械组装成叠层的单晶纳米级膜构成。
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4.
公开(公告)号:US20080315253A1
公开(公告)日:2008-12-25
申请号:US12042066
申请日:2008-03-04
Applicant: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
Inventor: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
IPC: H01L27/088 , H01L29/786 , H01L29/737 , H01L27/092
CPC classification number: H01L27/1266 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L29/66772 , H01L29/78648
Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Abstract translation: 本发明提供了制造具有前后处理能力的薄膜电子器件的方法。 使用这些方法,可以在前方和背面处理期间进行高温处理步骤。 该方法非常适用于制造背栅和双栅场效应晶体管,双面双极晶体管和3D集成电路。
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公开(公告)号:US08089073B2
公开(公告)日:2012-01-03
申请号:US12877269
申请日:2010-09-08
Applicant: Paul G. Evans , Max G. Lagally , Zhenqiang Ma , Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson
Inventor: Paul G. Evans , Max G. Lagally , Zhenqiang Ma , Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson
IPC: H01L27/04
CPC classification number: H01L27/1266 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L29/66772 , H01L29/78648
Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Abstract translation: 本发明提供了已经在其前侧和后侧处理的薄膜装置。 这些装置包括足够薄的机械柔性的活性层。 器件的示例包括背栅极和双栅极场效应晶体管,双面双极晶体管和3D集成电路。
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公开(公告)号:US07812353B2
公开(公告)日:2010-10-12
申请号:US12042066
申请日:2008-03-04
Applicant: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
Inventor: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
IPC: H01L29/73 , H01L29/772 , H01L29/78
CPC classification number: H01L27/1266 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L29/66772 , H01L29/78648
Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Abstract translation: 本发明提供了制造具有前后处理能力的薄膜电子器件的方法。 使用这些方法,可以在前方和背面处理期间进行高温处理步骤。 该方法非常适用于制造背栅和双栅场效应晶体管,双面双极晶体管和3D集成电路。
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公开(公告)号:US06597010B2
公开(公告)日:2003-07-22
申请号:US10093960
申请日:2002-03-08
Applicant: Mark A. Eriksson , Mark G. Friesen , Robert J. Joynt , Max G. Lagally , Daniel W. van der Weide , Paul Rugheimer , Donald E. Savage
Inventor: Mark A. Eriksson , Mark G. Friesen , Robert J. Joynt , Max G. Lagally , Daniel W. van der Weide , Paul Rugheimer , Donald E. Savage
IPC: H01L2906
CPC classification number: G06N99/002 , B82Y10/00 , Y10S977/933
Abstract: Semiconductor dot devices include a multiple layer semiconductor structure having a substrate, a back gate electrode layer, a quantum well layer, a tunnel barrier layer between the quantum well layer and the back gate, and a barrier layer above the quantum well layer. Multiple electrode gates are formed on the multi-layer semiconductor with the gates spaced from each other by a region beneath which quantum dots may be defined. Appropriate voltages applied to the electrodes allow the development and appropriate positioning of the quantum dots, allowing a large number of quantum dots be formed in a series with appropriate coupling between the dots.
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8.
公开(公告)号:US07135697B2
公开(公告)日:2006-11-14
申请号:US10787075
申请日:2004-02-25
Applicant: Mark Gregory Friesen , Charles George Tahan , Robert James Joynt , Mark A. Eriksson
Inventor: Mark Gregory Friesen , Charles George Tahan , Robert James Joynt , Mark A. Eriksson
IPC: H01L29/06
CPC classification number: B82Y10/00 , H01L29/127 , H01L29/66984
Abstract: A semiconductor quantum dot device converts spin information to charge information utilizing an elongated quantum dot having an asymmetric confining potential along its length so that charge movement occurs during orbital excitation. A single electron sensitive electrometer is utilized to detect the charge movement. Initialization and readout can be carried out rapidly utilizing RF fields at appropriate frequencies.
Abstract translation: 半导体量子点装置利用具有沿其长度具有不对称限制电位的细长量子点将自旋信息转换为电荷信息,从而在轨道激励期间发生电荷运动。 使用单个电子敏感静电计来检测电荷运动。 初始化和读出可以利用适当频率的RF场快速地进行。
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9.
公开(公告)号:US20100327355A1
公开(公告)日:2010-12-30
申请号:US12877269
申请日:2010-09-08
Applicant: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
Inventor: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
CPC classification number: H01L27/1266 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L29/66772 , H01L29/78648
Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Abstract translation: 本发明提供了已经在其前侧和后侧处理的薄膜装置。 这些装置包括足够薄的机械柔性的活性层。 器件的示例包括背栅极和双栅极场效应晶体管,双面双极晶体管和3D集成电路。
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10.
公开(公告)号:US07354809B2
公开(公告)日:2008-04-08
申请号:US11276065
申请日:2006-02-13
Applicant: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
Inventor: Hao-Chih Yuan , Guogong Wang , Mark A. Eriksson , Paul G. Evans , Max G. Lagally , Zhenqiang Ma
IPC: H01L21/46
CPC classification number: H01L27/1266 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L29/66772 , H01L29/78648
Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Abstract translation: 本发明提供了制造具有前后处理能力的薄膜电子器件的方法。 使用这些方法,可以在前方和背面处理期间进行高温处理步骤。 该方法非常适用于制造背栅和双栅场效应晶体管,双面双极晶体管和3D集成电路。
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