公开(公告)号：US20130270663A1

公开(公告)日：2013-10-17

申请号：US13755376

申请日：2013-01-31

Applicant: Hsing-Lien LIN ,  Yeur-Luen TU ,  Cheng-Yuan TSAI ,  Cheng-Ta WU ,  Chia-Shiung TSAI

Inventor： Hsing-Lien LIN ,  Yeur-Luen TU ,  Cheng-Yuan TSAI ,  Cheng-Ta WU ,  Chia-Shiung TSAI

IPC: H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/14609 ,  H01L27/1462 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14685 ,  H01L31/02168

Abstract: A method of forming an image sensor device includes forming a light sensing region at a front surface of a silicon substrate and a patterned metal layer there over. Thereafter, the method includes depositing a metal oxide anti-reflection laminate on the first surface of the substrate. The metal oxide anti-reflection laminate includes one or more composite layers of thin metal oxides stacked over the photodiode. Each composite layer includes two or more metal oxide layers: one metal oxide is a high energy band gap metal oxide and another metal oxide is a high refractive index metal oxide.

Abstract translation: 形成图像传感器装置的方法包括在硅衬底的前表面上形成感光区域，并在其上形成图案化的金属层。 此后，该方法包括在基板的第一表面上沉积金属氧化物防反射层压板。 金属氧化物防反射层叠体包括层叠在光电二极管上的一层以上的金属氧化物复合层。 每个复合层包括两个或更多个金属氧化物层：一个金属氧化物是高能带隙金属氧化物，另一个金属氧化物是高折射率金属氧化物。

公开(公告)号：US20130093048A1

公开(公告)日：2013-04-18

申请号：US13275021

申请日：2011-10-17

Applicant: Yao-Wen Chang ,  Cheng-Yuan Tsai ,  Hsing-Lien Lin

Inventor： Yao-Wen Chang ,  Cheng-Yuan Tsai ,  Hsing-Lien Lin

IPC: H01L29/92 ,  H01L21/02

CPC classification number: H01L29/792 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02107 ,  H01L21/02109 ,  H01L21/02112 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/28158 ,  H01L21/28176 ,  H01L21/28264 ,  H01L21/30604 ,  H01L21/30612 ,  H01L23/485 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/40 ,  H01L28/60 ,  H01L29/20 ,  H01L29/205 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/517 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/6656 ,  H01L29/7783 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may utilize a first precursor for a first time period, a first purge for a second time period longer than the first time period, a second precursor for a third time period longer than the first time period, and a second purge for a fourth time period longer than the third time period.

Abstract translation: 提供一种用于制造半导体器件的系统和方法。 一个实施例包括使用原子层沉积（ALD）工艺形成沉积层。 ALD方法可以利用第一时间段的第一前体，比第一时间段长的第二时间段的第一次净化，第三时间段比第一时间段长的第二前体， 第四个时间段长于第三个时间段。

公开(公告)号：US07199001B2

公开(公告)日：2007-04-03

申请号：US10811657

申请日：2004-03-29

Applicant: Chih-Ta Wu ,  Kuo-Yin Lin ,  Tsung-Hsun Huang ,  Chung-Yi Yu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Hsing-Lien Lin ,  Chia-Shiung Tsai

Inventor： Chih-Ta Wu ,  Kuo-Yin Lin ,  Tsung-Hsun Huang ,  Chung-Yi Yu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Hsing-Lien Lin ,  Chia-Shiung Tsai

IPC: H01L21/8242

CPC classification number: H01L28/60 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A novel method for forming electrodes in the fabrication of an MIM (metal-insulator-metal) capacitor, is disclosed. The method improves MIM capacitor performance by preventing plasma-induced damage to a dielectric layer during deposition of a top electrode on the dielectric layer, as well as by reducing or preventing the formation of an interfacial layer between the dielectric layer and the electrode or electrodes, in fabrication of the MIM capacitor. The method typically includes the patterning of crown-type capacitor openings in a substrate; depositing a bottom electrode in each of the crown openings; subjecting the bottom electrode to a rapid thermal processing (RTP) or furnace anneal step; depositing a dielectric layer on the annealed bottom electrode; depositing a top electrode on the dielectric layer using a plasma-free CVD (chemical vapor deposition) or ALD (atomic layer deposition) process; and patterning the top electrode of each MIM capacitor.

Abstract translation: 公开了一种用于在MIM（金属 - 绝缘体 - 金属）电容器的制造中形成电极的新颖方法。 该方法通过在电介质层上的顶部电极沉积期间防止等离子体对电介质层的损伤，以及通过减少或防止介电层和电极或电极之间的界面层的形成来改善MIM电容器性能， 在MIM电容器的制造中。 该方法通常包括在衬底中图案化冠状电容器开口; 在每个冠状开口中沉积底部电极; 对底部电极进行快速热处理（RTP）或炉退火步骤; 在退火的底部电极上沉​​积介电层; 使用无等离子体CVD（化学气相沉积）或ALD（原子层沉积）工艺在电介质层上沉积顶部电极; 并对每个MIM电容器的顶部电极进行构图。

公开(公告)号：US08889507B2

公开(公告)日：2014-11-18

申请号：US11765971

申请日：2007-06-20

Applicant: Chih-Ta Wu ,  Jason Lee ,  Chung Chien Wang ,  Hsing-Lien Lin ,  Yu-Jen Wang ,  Yeur-Luen Tu ,  Chern-Yow Hsu ,  Yuan-Hung Liu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai ,  Lucy Chang ,  Chia-Lin Chen ,  Ming-Chih Tsai

Inventor： Chih-Ta Wu ,  Jason Lee ,  Chung Chien Wang ,  Hsing-Lien Lin ,  Yu-Jen Wang ,  Yeur-Luen Tu ,  Chern-Yow Hsu ,  Yuan-Hung Liu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai ,  Lucy Chang ,  Chia-Lin Chen ,  Ming-Chih Tsai

IPC: H01L21/8234 ,  H01L21/8244 ,  H01L49/02 ,  H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/75

Abstract: A capacitor and methods for forming the same are provided. The method includes forming a bottom electrode; treating the bottom electrode in an oxygen-containing environment to convert a top layer of the bottom electrode into a buffer layer; forming an insulating layer on the buffer layer; and forming a top electrode over the insulating layer.

Abstract translation: 提供电容器及其形成方法。 该方法包括形成底部电极; 在含氧环境中处理底部电极以将底部电极的顶层转化为缓冲层; 在缓冲层上形成绝缘层; 并在所述绝缘层上形成顶部电极。

公开(公告)号：US08759234B2

公开(公告)日：2014-06-24

申请号：US13275021

申请日：2011-10-17

Applicant: Yao-Wen Chang ,  Cheng-Yuan Tsai ,  Hsing-Lien Lin

Inventor： Yao-Wen Chang ,  Cheng-Yuan Tsai ,  Hsing-Lien Lin

IPC: H01L21/31 ,  C23C16/455 ,  H01L21/28 ,  H01L21/02 ,  C23C16/40 ,  H01L23/485 ,  H01L29/778 ,  H01L29/20 ,  H01L49/02 ,  H01L27/108 ,  H01L29/51

CPC classification number: H01L29/792 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02107 ,  H01L21/02109 ,  H01L21/02112 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/28158 ,  H01L21/28176 ,  H01L21/28264 ,  H01L21/30604 ,  H01L21/30612 ,  H01L23/485 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/40 ,  H01L28/60 ,  H01L29/20 ,  H01L29/205 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/517 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/6656 ,  H01L29/7783 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may utilize a first precursor for a first time period, a first purge for a second time period longer than the first time period, a second precursor for a third time period longer than the first time period, and a second purge for a fourth time period longer than the third time period.

Abstract translation: 提供一种用于制造半导体器件的系统和方法。 一个实施例包括使用原子层沉积（ALD）工艺形成沉积层。 ALD过程可以利用第一时间段的第一前体，比第一时间段长的第二时间段的第一次净化，第三时间段比第一时间段长的第二前体， 第四个时间段长于第三个时间段。

公开(公告)号：US20080188055A1

公开(公告)日：2008-08-07

申请号：US11586528

申请日：2006-10-26

Applicant: Yu-Jen Wang ,  Chia-Shiung Tsai ,  Yeur-Luen Tu ,  Lan-Lin Chao ,  Chih-Ta Wu ,  Hsing-Lien Lin ,  Chung Chien Wang

Inventor： Yu-Jen Wang ,  Chia-Shiung Tsai ,  Yeur-Luen Tu ,  Lan-Lin Chao ,  Chih-Ta Wu ,  Hsing-Lien Lin ,  Chung Chien Wang

IPC: H01L21/02

CPC classification number: H01L28/60 ,  H01L21/321

Abstract: A method of manufacturing a semiconductor device includes forming a metal-insulator-metal (MIM) device having a metal organic chemical vapor deposited (MOCVD) lower electrode and an atomic layer deposited (ALD) upper electrode.

Abstract translation: 一种制造半导体器件的方法包括形成具有金属有机化学气相沉积（MOCVD）下电极和原子层沉积（ALD）上电极的金属 - 绝缘体 - 金属（MIM）器件。

公开(公告)号：US07851324B2

公开(公告)日：2010-12-14

申请号：US11586528

申请日：2006-10-26

Applicant: Yu-Jen Wang ,  Chia-Shiung Tsai ,  Yeur-Luen Tu ,  Lan-Lin Chao ,  Chih-Ta Wu ,  Hsing-Lien Lin ,  Chung Chien Wang

Inventor： Yu-Jen Wang ,  Chia-Shiung Tsai ,  Yeur-Luen Tu ,  Lan-Lin Chao ,  Chih-Ta Wu ,  Hsing-Lien Lin ,  Chung Chien Wang

IPC: H01L29/94

CPC classification number: H01L28/60 ,  H01L21/321

Abstract: A method of manufacturing a semiconductor device includes forming a metal-insulator-metal (MIM) device having a metal organic chemical vapor deposited (MOCVD) lower electrode and an atomic layer deposited (ALD) upper electrode.

Abstract translation: 一种制造半导体器件的方法包括形成具有金属有机化学气相沉积（MOCVD）下电极和原子层沉积（ALD）上电极的金属 - 绝缘体 - 金属（MIM）器件。

公开(公告)号：US20070247784A1

公开(公告)日：2007-10-25

申请号：US11379478

申请日：2006-04-20

Applicant: Yu-Jen Wang ,  Hsing-Lien Lin ,  Yeur-Luen Tu

Inventor： Yu-Jen Wang ,  Hsing-Lien Lin ,  Yeur-Luen Tu

IPC: H01G4/06

CPC classification number: H01G4/10 ,  H01G4/005 ,  H01G4/12 ,  H01G4/33 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed herein are new MIM structures having increased capacitance with little or no tunneling current, and related methods of manufacturing the same. In one embodiment, the new MIM structure comprises a first electrode comprising a magnetic metal and having a magnetic moment aligned in a first direction, and a second electrode comprising a magnetic metal and having a magnetic moment aligned in a second direction antiparallel to the first direction. In addition, such an MIM structure comprises a dielectric layer formed between the first and second electrodes and contacting the first and second magnetic metals.

Abstract translation: 这里公开了具有增加的电容，很少或没有隧道电流的新的MIM结构，以及相关的制造方法。 在一个实施例中，新的MIM结构包括包括磁性金属并且具有在第一方向上对准的磁矩的第一电极和包括磁性金属的第二电极，并且具有在与第一方向相反的第二方向上对准的磁矩 。 此外，这种MIM结构包括形成在第一和第二电极之间并与第一和第二磁性金属接触的电介质层。

公开(公告)号：US20050215004A1

公开(公告)日：2005-09-29

申请号：US10811657

申请日：2004-03-29

Applicant: Chih-Ta Wu ,  Kuo-Yin Lin ,  Tsung-Hsun Huang ,  Chung-Yi Yu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Hsing-Lien Lin ,  Chia-Shiung Tsai

Inventor： Chih-Ta Wu ,  Kuo-Yin Lin ,  Tsung-Hsun Huang ,  Chung-Yi Yu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Hsing-Lien Lin ,  Chia-Shiung Tsai

IPC: H01G4/005 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/44 ,  H01L23/522 ,  H01L29/06

CPC classification number: H01L28/60 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A novel method for forming electrodes in the fabrication of an MIM (metal-insulator-metal) capacitor, is disclosed. The method improves MIM capacitor performance by preventing plasma-induced damage to a dielectric layer during deposition of a top electrode on the dielectric layer, as well as by reducing or preventing the formation of an interfacial layer between the dielectric layer and the electrode or electrodes, in fabrication of the MIM capacitor. The method typically includes the patterning of crown-type capacitor openings in a substrate; depositing a bottom electrode in each of the crown openings; subjecting the bottom electrode to a rapid thermal processing (RTP) or furnace anneal step; depositing a dielectric layer on the annealed bottom electrode; depositing a top electrode on the dielectric layer using a plasma-free CVD (chemical vapor deposition) or ALD (atomic layer deposition) process; and patterning the top electrode of each MIM capacitor.

Abstract translation: 公开了一种用于在MIM（金属 - 绝缘体 - 金属）电容器的制造中形成电极的新颖方法。 该方法通过在电介质层上的顶部电极沉积期间防止等离子体对电介质层的损伤，以及通过减少或防止介电层和电极或电极之间的界面层的形成来改善MIM电容器性能， 在MIM电容器的制造中。 该方法通常包括在衬底中图案化冠状电容器开口; 在每个冠状开口中沉积底部电极; 对底部电极进行快速热处理（RTP）或炉退火步骤; 在退火的底部电极上沉​​积介电层; 使用无等离子体CVD（化学气相沉积）或ALD（原子层沉积）工艺在电介质层上沉积顶部电极; 并对每个MIM电容器的顶部电极进行构图。

公开(公告)号：US07529078B2

公开(公告)日：2009-05-05

申请号：US11379478

申请日：2006-04-20

Applicant: Yu-Jen Wang ,  Hsing-Lien Lin ,  Yeur-Luen Tu

Inventor： Yu-Jen Wang ,  Hsing-Lien Lin ,  Yeur-Luen Tu

IPC: H01G4/38

CPC classification number: H01G4/10 ,  H01G4/005 ,  H01G4/12 ,  H01G4/33 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed herein are new MIM structures having increased capacitance with little or no tunneling current, and related methods of manufacturing the same. In one embodiment, the new MIM structure comprises a first electrode comprising a magnetic metal and having a magnetic moment aligned in a first direction, and a second electrode comprising a magnetic metal and having a magnetic moment aligned in a second direction antiparallel to the first direction. In addition, such an MIM structure comprises a dielectric layer formed between the first and second electrodes and contacting the first and second magnetic metals.

Abstract translation: 这里公开了具有增加的电容，很少或没有隧道电流的新的MIM结构，以及相关的制造方法。 在一个实施例中，新的MIM结构包括包括磁性金属并且具有在第一方向上对准的磁矩的第一电极和包括磁性金属的第二电极，并且具有在与第一方向相反的第二方向上对准的磁矩 。 此外，这种MIM结构包括形成在第一和第二电极之间并与第一和第二磁性金属接触的电介质层。