公开(公告)号：US08916462B2

公开(公告)日：2014-12-23

申请号：US13610673

申请日：2012-09-11

申请人： Hiroyuki Kitabayashi ,  Hideto Tamaso ,  Taku Horii

发明人： Hiroyuki Kitabayashi ,  Hideto Tamaso ,  Taku Horii

IPC分类号： H01L21/283

CPC分类号： H01L21/046 ,  H01L21/0485 ,  H01L21/049 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.

摘要翻译： 一种制造MOSFET的方法包括以下步骤：制备由碳化硅制成的衬底; 形成与基板欧姆接触的漏电极; 以及在所述漏极电极上并与所述漏电极接触形成背面焊盘电极。 在形成漏电极的步骤中形成的漏极由含有Ti和Si的合金制成。 此外，形成的背面焊盘电极保持在300℃以下的温度直到MOSFET完成。 因此，制造工艺可以有效地同时实现电极之间的优异粘附。

公开(公告)号：US08227279B2

公开(公告)日：2012-07-24

申请号：US12539355

申请日：2009-08-11

申请人： Koji Katayama ,  Hiroyuki Kitabayashi ,  Satoshi Arakawa

发明人： Koji Katayama ,  Hiroyuki Kitabayashi ,  Satoshi Arakawa

IPC分类号： H01L21/00

CPC分类号： H01L21/3081 ,  H01L21/32139

摘要： A method of manufacturing a semiconductor element of good characteristics at a reduced manufacturing cost is provided. The manufacturing method of the semiconductor element includes a GaN-containing semiconductor layer forming step, an electrode layer forming step, a step of forming an Al film on the GaN-containing semiconductor layer, a step of forming a mask layer made of a material of which etching rate is smaller than that of a material of the Al film, a step of forming a ridge portion using the mask layer as a mask, a step of retreating a position of a side wall of the Al film with respect to a position of a side wall of the mask layer, a step of forming, on the side surface of the ridge portion and the top surface of the mask layer, a protective film made of a material of which etching rate is smaller than that of the material forming the Al film, and a step of removing the Al film and thereby removing the mask layer and a portion of the protective film formed on the top surface of the mask layer.

摘要翻译： 提供一种以降低的制造成本制造具有良好特性的半导体元件的方法。 半导体元件的制造方法包括含GaN半导体层形成工序，电极层形成工序，在含GaN半导体层上形成Al膜的工序，形成掩模层的工序， 该蚀刻速率小于Al膜的材料的蚀刻速率，使用该掩模层作为掩模形成脊部的步骤，相对于Al膜的位置退回Al膜的侧壁的位置的步骤 掩模层的侧壁，在脊部的侧表面和掩模层的顶表面上形成保护膜，该保护膜的蚀刻速率小于形成该掩模层的材料的蚀刻速率的材料 Al膜，以及除去Al膜，从而除去掩模层和形成在掩模层的顶表面上的保护膜的一部分的步骤。

公开(公告)号：US20110049542A1

公开(公告)日：2011-03-03

申请号：US12935913

申请日：2009-05-27

申请人： So Tanaka ,  Kenichi Miyahara ,  Hiroyuki Kitabayashi ,  Koji Katayama ,  Tomonori Morishita ,  Tatsuya Moriwake

发明人： So Tanaka ,  Kenichi Miyahara ,  Hiroyuki Kitabayashi ,  Koji Katayama ,  Tomonori Morishita ,  Tatsuya Moriwake

IPC分类号： H01L29/205 ,  H01L33/30 ,  C30B19/12

CPC分类号： H01L33/0062 ,  C30B19/00 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/0251 ,  H01L21/02546 ,  H01L21/02628

摘要： The present invention makes available AlxGa(1-x)As (0≦x≦1) substrates, epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior characteristics.An AlxGa(1-x)As substrate (10a) of the present invention is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater than the amount fraction x of Al in the major surface (11a). In addition, the AlxGa(1-x)As substrate (10a) is further furnished with a GaAs substrate (13), contacting the rear face (11b) of the AlxGa(1-x)As layer (11).

摘要翻译： 本发明提供了Al x Ga（1-x）As（0＆nlE; x＆nlE; 1）衬底，用于红外LED的外延晶片，红外LED，制造Al x Ga（1-x）As衬底的方法，制造用于红外LED的外延晶片的方法 以及制造红外LED的方法，由此保持高水平的透射率，并且在半导体器件的制造中证明该器件具有优异的特性。 本发明的Al x Ga（1-x）As衬底（10a）是具有主表面（11a）的Al x Ga（1-x）As层（11）的Al x Ga（1-x）As衬底（10a） 并且在与主表面（11a）相反的一侧具有背面（11b），其特征在于，在Al x Ga（1-x）As层（11）中，后面的Al的量分数x （11b）大于主表面（11a）中的Al的量分数x。 此外，Al x Ga（1-x）As衬底（10a）还具有与Al x Ga（1-x）As层（11）的背面（11b）接触的GaAs衬底（13）。

公开(公告)号：US07423284B2

公开(公告)日：2008-09-09

申请号：US11362407

申请日：2006-02-24

申请人： Youichi Nagai ,  Koji Katayama ,  Hiroyuki Kitabayashi

发明人： Youichi Nagai ,  Koji Katayama ,  Hiroyuki Kitabayashi

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/08 ,  H01L39/22 ,  H01L27/15 ,  H01L29/267 ,  H01L31/12 ,  H01L33/00 ,  H01L29/22

CPC分类号： H01L33/20 ,  H01L33/32 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/00014

摘要： A light-emitting device includes a GaN substrate; a n-type AlxGa1-xN layer on a first main surface side of the GaN substrate; a p-type AlxGa1-xN layer positioned further away from the GaN substrate compared to the n-type AlxGa1-xN layer; a multi-quantum well (MQW) positioned between the n-type AlxGa1-xN layer and the p-type AlxGa1-xN layer. In this light-emitting device, the p-type AlxGa1-xN layer side is down-mounted and light is emitted from the second main surface, which is the main surface of the GaN substrate opposite from the first main surface. hemispherical projections are formed on the second main surface of the GaN substrate.

摘要翻译： 发光器件包括GaN衬底; 在GaN衬底的第一主表面侧上的n型Al x Ga 1-x N层; 与n型Al x Ga相比位于更远离GaN衬底的p型Al x Ga 1-x N层， SUB> 1-x N层; 定位在n型Al x Ga 1-x N层和p型Al x x N层之间的多量子阱（MQW） Ga 1-x N层。 在该发光装置中，p型Al x Ga 1-x N层侧被下放，从第二主表面射出光 GaN衬底的与第一主表面相对的主表面。 在GaN衬底的第二主表面上形成半球形突起。

公开(公告)号：US20080023708A1

公开(公告)日：2008-01-31

申请号：US11863220

申请日：2007-09-27

申请人： Katsushi Akita ,  Yusuke Yoshizumi ,  Takashi Kyono ,  Hiroyuki Kitabayashi ,  Koji Katayama

发明人： Katsushi Akita ,  Yusuke Yoshizumi ,  Takashi Kyono ,  Hiroyuki Kitabayashi ,  Koji Katayama

IPC分类号： H01L33/00

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/06

摘要： Affords a semiconductor light-emitting device in which a decrease in external quantum efficiency has been minimized even at high current densities. In a semiconductor light-emitting device (11), a gallium nitride cladding layer (13) has a threading dislocation density of 1×107 cm−2 or less. An active region (17) has a quantum well structure (17a) consisted of a plurality of well layers (19) and a plurality of barrier layers (21), and the quantum well structure (17a) is provided so as to emit light having a peak wavelength within the wavelength range of 420 nm to 490 nm inclusive. The well layers (19) each include an un-doped InXGa1-XN (0

摘要翻译： 提供了即使在高电流密度下也减小了外部量子效率的半导体发光器件。 在半导体发光器件（11）中，氮化镓覆层（13）的穿透位错密度为1×10 -7 cm -2以下。 有源区（17）具有由多个阱层（19）和多个阻挡层（21）组成的量子阱结构（17a），并且量子阱结构（17a）被设置为发射 具有在420nm至490nm的波长范围内的峰值波长的光。 阱层（19）各自包括未掺杂的In 1 X 1 Ga 1-X N（0

公开(公告)号：US20060278864A1

公开(公告)日：2006-12-14

申请号：US11365642

申请日：2006-02-28

申请人： Youichi Nagai ,  Koji Katayama ,  Hiroyuki Kitabayashi

发明人： Youichi Nagai ,  Koji Katayama ,  Hiroyuki Kitabayashi

IPC分类号： H01L29/06

CPC分类号： H01L33/22 ,  H01L33/20 ,  H01L33/32 ,  H01L33/38 ,  H01L33/44 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

摘要： A light-emitting device is equipped with a GaN substrate; an n-type AlxGa1-xN layer on a first main surface side of the GaN substrate; a p-type AlxGa1-xN layer positioned further away from the GaN substrate than the n-type AlxGa1-xN layer; and a multi-quantum well (MQW) positioned between the n-type AlxGa1-xN layer and the p-type AlxGa1-xN layer. In the light-emitting device, the p-type AlxGa1-xN layer side is down-mounted and light is emitted from a second main surface, which is the main surface opposite from the first main surface of the GaN substrate. The second main surface of the GaN substrate includes a region on which cavities and projections are formed. Also, the light-emitting device includes an n-electrode formed on the second main surface of the GaN substrate 1 and a protective film formed to cover the side wall of the n-electrode.

摘要翻译： 发光装置配备有GaN衬底; 在GaN衬底的第一主表面侧上的n型Al x Ga 1-x N层; 位于距离GaN衬底更远的p型Al x Ga 1-x N层比n型Al x Ga > 1-x N层; 以及位于n型Al x Ga 1-x N层和p型Al x 1 / x N层之间的多量子阱（MQW） > Ga 1-x N层。 在发光装置中，p型Al x Ga 1-x N层侧被下放，从第二主表面发光， 与GaN衬底的第一主表面相对的主表面。 GaN衬底的第二主表面包括形成空腔和突起的区域。 此外，发光器件包括形成在GaN衬底1的第二主表面上的n电极和形成为覆盖n电极的侧壁的保护膜。

公开(公告)号：US6025636A

公开(公告)日：2000-02-15

申请号：US951615

申请日：1997-10-16

申请人： Hideaki Nakahata ,  Masashi Narita ,  Kenjiro Higaki ,  Satoshi Fujii ,  Hiroyuki Kitabayashi ,  Shin-ichi Shikata

发明人： Hideaki Nakahata ,  Masashi Narita ,  Kenjiro Higaki ,  Satoshi Fujii ,  Hiroyuki Kitabayashi ,  Shin-ichi Shikata

IPC分类号： H03H9/02 ,  H01L29/82

CPC分类号： H03H9/02582

摘要： A surface acoustic wave device includes at least diamond, a single crystal LiNbO.sub.3 layer formed on the diamond, and an interdigital transducer formed in contact with the LiNbO.sub.3 layer and uses a surface acoustic wave (wavelength: .lambda..sub.n .mu.m) in an nth-order mode (n=1 or 2). When the thickness of the LiNbO.sub.3 layer is t.sub.1 (.mu.m), kh.sub.1 =2.pi.(t.sub.1 /.lambda..sub.n) and the cut orientation (.theta., .PHI., and .psi. represented by an Eulerian angle representation) with respect to the crystallographic fundamental coordinate system of the LiNbO.sub.3 layer are selected from values within specific ranges. Consequently, a surface acoustic wave device which increases the propagation velocity (V) of a surface acoustic wave and improves the electromechanical coupling coefficient (K.sup.2) is realized.

摘要翻译： 表面声波装置至少包括金刚石，形成在金刚石上的单晶LiNbO 3层和与LiNbO 3层接触形成的叉指换能器，并使用n阶的表面声波（波长：λnμm） 模式（n = 1或2）。 当LiNbO 3层的厚度为t1（μm）时，相对于晶体基础坐标系，kh1 =2π（t1 /λn）和切割取向（θ，PHI和由欧拉角表示的psi） 的LiNbO 3层选自特定范围内的值。 因此，实现了提高声表面波的传播速度（V）并提高机电耦合系数（K2）的声表面波装置。

公开(公告)号：US5783896A

公开(公告)日：1998-07-21

申请号：US791894

申请日：1997-01-31

申请人： Hideaki Nakahata ,  Kenjiro Higaki ,  Satoshi Fujii ,  Hiroyuki Kitabayashi ,  Shin-ichi Shikata

发明人： Hideaki Nakahata ,  Kenjiro Higaki ,  Satoshi Fujii ,  Hiroyuki Kitabayashi ,  Shin-ichi Shikata

IPC分类号： H03H9/02 ,  H03H9/10 ,  H03H9/145

CPC分类号： H03H9/02582

摘要： A first surface acoustic wave device for 2nd mode surface acoustic wave of a wavelength .lambda. (.mu.m) according to the present invention is a SAW device of "type A" device shown in FIG. 6A, wherein a parameter kh3=2.pi.(t.sub.A /.lambda.) is: 0.033.ltoreq.kh3.ltoreq.0.099, and wherein a parameter kh1=2.pi.(t.sub.z /.lambda.) and a parameter kh2=2.pi.(t.sub.s /.lambda.) are given within a region ABCDEFGHIJKLA in a two-dimensional Cartesin coordinate graph of FIG. 1.

摘要翻译： 根据本发明的波长λ（μm）的第二模式表面声波的第一表面声波装置是图1所示的“A型”装置的SAW装置。 其中参数kh3 =2π（tA /λ）为：0.033≤kh3

公开(公告)号：US20130143398A1

公开(公告)日：2013-06-06

申请号：US13610673

申请日：2012-09-11

申请人： Hiroyuki Kitabayashi ,  Hideto Tamaso ,  Taku Horii

发明人： Hiroyuki Kitabayashi ,  Hideto Tamaso ,  Taku Horii

IPC分类号： H01L21/283

CPC分类号： H01L21/046 ,  H01L21/0485 ,  H01L21/049 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.

摘要翻译： 一种制造MOSFET的方法包括以下步骤：制备由碳化硅制成的衬底; 形成与基板欧姆接触的漏电极; 以及在所述漏极电极上并与所述漏电极接触形成背面焊盘电极。 在形成漏电极的步骤中形成的漏极由含有Ti和Si的合金制成。 此外，形成的背面焊盘电极保持在300℃以下的温度直到MOSFET完成。 因此，制造工艺可以有效地同时实现电极之间的优异粘附。

公开(公告)号：US20100120231A1

公开(公告)日：2010-05-13

申请号：US12529073

申请日：2009-02-12

申请人： Hiroyuki Kitabayashi ,  Koji Katayama ,  Satoshi Arakawa

发明人： Hiroyuki Kitabayashi ,  Koji Katayama ,  Satoshi Arakawa

IPC分类号： H01L21/20 ,  H01L21/28

CPC分类号： H01L21/3081 ,  H01S5/0425 ,  H01S5/2086

摘要： A method for manufacturing a semiconductor device according to the present invention includes the following step: a step (S10) of forming a GaN-based semiconductor layer, a step (S20) of forming an Al film on the GaN-based semiconductor layer, a step (S30, S40) of forming a mask layer composed of a material having a lower etching rate than that of the material constituting the Al film, a step (S50) of partially removing the Al film and the GaN-based semiconductor layer using the mask layer as a mask to form a ridge portion, a step (S60) of retracting the positions of the side walls at the ends of the Al film from the positions of the side walls of the mask layer, a step (S70) of forming a protection film composed of a material having a lower etching rate than that of the material constituting the Al film on the side surfaces of the ridge portion and on the upper surface of the mask layer, and a step (S80) of removing the Al film to remove the mask layer and the protection film formed on the upper surface of the mask layer.

摘要翻译： 根据本发明的制造半导体器件的方法包括以下步骤：形成GaN基半导体层的步骤（S10），在GaN基半导体层上形成Al膜的步骤（S20）， 形成由具有比构成Al膜的材料的蚀刻速率低的材料构成的掩模层的步骤（S30，S40）;使用该步骤（S50）部分地除去Al膜和GaN基半导体层 掩模层作为掩模以形成脊部;步骤（S60），从掩模层的侧壁的位置缩回Al膜的端部处的侧壁的位置，形成步骤（S70） 由掩模层的侧表面和掩模层的上表面上的蚀刻速率低于构成Al膜的材料的蚀刻速率低的材料形成的保护膜，以及除去Al膜的步骤（S80） 以去除掩模层和形成的保护膜 n掩模层的上表面。