公开(公告)号：US07845231B2

公开(公告)日：2010-12-07

申请号：US12088046

申请日：2006-09-27

申请人： Kazue Kurihara ,  Hiroshi Sakuma ,  Masashi Mizukami

发明人： Kazue Kurihara ,  Hiroshi Sakuma ,  Masashi Mizukami

IPC分类号： G01H13/00 ,  G01N3/24

CPC分类号： G01N19/04 ,  G01N2203/0025

摘要： A resonance shear measuring method capable of simple and rapid measurement by obtaining a resonance shear curve through Fourier transformation of a damping curve of an oscillation on one side surface of a sample during measurement of shear response from the sample is provided. The method is to measure shear response of the sample sandwiched between the solid surfaces of a resonance shear measurement unit along with a change in film thickness by applying an input signal Uin to a horizontal driving section of the shear resonance measurement unit, by detecting an oscillation on one side surface of the sample sandwiched between solid surfaces of the resonance shear measurement unit as an output signal Uout by means of a displacement gauge, and by applying the output signal Uout along with the input signal Uin to a resonance shear signal analyzer, wherein a damping curve of the oscillation on one side surface of the sample is Fourier transformed by a Fourier transformation section (5B) to obtain a resonance shear curve. Also provided is a twin-path type apparatus for shear stress measurement capable of precise measurement of shear stress by using a twin-path method by which a distance between opaque substrates can be measured.

摘要翻译： 提供一种共振剪切测量方法，其能够通过在从样品的剪切响应测量期间在样品的一个侧表面上的振荡的阻尼曲线通过傅里叶变换获得共振剪切曲线来简单且快速地测量。 该方法是通过将输入信号Uin施加到剪切共振测量单元的水平驱动部分，通过检测振荡来测量夹在共振剪切测量单元的固体表面之间的样品的剪切响应以及膜厚度的变化 在夹持在谐振剪切测量单元的固体表面之间的样品的一个侧表面上，通过位移计将输出信号Uout与输入信号Uin一起施加到谐振剪切信号分析仪，其中， 通过傅立叶变换部（5B）对样品的一个侧面的振动的阻尼曲线进行傅里叶变换，得到共振剪切曲线。 还提供了一种用于剪切应力测量的双路型装置，其能够通过使用可以测量不透明基板之间的距离的双路径方法来精确测量剪切应力。

公开(公告)号：US07256144B2

公开(公告)日：2007-08-14

申请号：US10808193

申请日：2004-03-24

申请人： Kenichi Koyanagi ,  Hiroshi Sakuma

发明人： Kenichi Koyanagi ,  Hiroshi Sakuma

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02271 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/3141 ,  H01L21/31637 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/90

摘要： A method for forming a capacitor insulation film includes the step of depositing a monoatomic film made of a metal by supplying a metal source including the metal and no oxygen, and depositing a metal oxide film including the metal by using a CVD technique. The method provides the metal oxide film having higher film properties with a higher throughput.

摘要翻译： 一种形成电容器绝缘膜的方法包括通过提供包括金属和不含氧的金属源沉积由金属制成的单原子膜并通过CVD技术沉积包括金属的金属氧化物膜的步骤。 该方法提供具有较高膜特性并具有较高生产量的金属氧化物膜。

公开(公告)号：US07074669B2

公开(公告)日：2006-07-11

申请号：US10443572

申请日：2003-05-22

申请人： Shinpei Iijima ,  Hiroshi Sakuma

发明人： Shinpei Iijima ,  Hiroshi Sakuma

IPC分类号： H01L21/8242

CPC分类号： H01L28/65 ,  H01L21/31604 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10882 ,  H01L27/10894 ,  H01L28/75 ,  H01L28/90

摘要： A semiconductor integrated circuit device includes a plurality of capacitor elements, which are separated from each other by a first insulating film on a plane. Each of the plurality of capacitor elements has a lower electrode, a dielectric film, and an upper electrode, and the lower electrode has a crown structure. At least one of the lower electrode and the upper electrode has a laminate structure composed of a plurality of conductive films. An outermost film of the laminate structure on a side of the dielectric film is a ruthenium film, and a portion of the laminate structure other than the outermost film has higher selective growth than the first insulating film with respect to the ruthenium film. Here, the first insulating film is desirably a tantalum oxide film.

公开(公告)号：US4841190A

公开(公告)日：1989-06-20

申请号：US186820

申请日：1988-04-27

申请人： Kunitake Matsushita ,  Hiroshi Sakuma ,  Takayuki Yamawaki ,  Takashi Yoshikura ,  Hiroshi Sano ,  Yuzuru Suzuki ,  Michihiro Torii ,  Tohru Ohnuki

发明人： Kunitake Matsushita ,  Hiroshi Sakuma ,  Takayuki Yamawaki ,  Takashi Yoshikura ,  Hiroshi Sano ,  Yuzuru Suzuki ,  Michihiro Torii ,  Tohru Ohnuki

IPC分类号： H02K37/14

CPC分类号： H02K37/14

摘要： A permanent-magnet stepping motor includes a stator which has resinous protrusions at its one end. An end plate disposed on one side of the stator is molded integrally with the stator. A flange plate is fixed to the other side of the stator, using the protrusions. The stator includes four stator yokes and two annular coils that are disposed at given positions. These yokes and coils are coupled together by molding a resin.

公开(公告)号：US07119443B2

公开(公告)日：2006-10-10

申请号：US10959634

申请日：2004-10-07

申请人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

发明人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L27/10852 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

摘要翻译： 根据以下步骤形成半导体器件。 通过CVD法将TiN膜71和W膜72沉积在包括通孔66内部的氧化硅膜64上，然后将氧化硅膜64上的W膜72和TiN膜71回蚀 仅留下通孔66的内部并形成插头73。 然后，通过溅射法将TiN膜74，Al合金膜75和Ti膜76沉积在包括插塞73的表面的氧化硅膜64上，然后，将Ti膜76，Al合金膜75， 并且将TiN膜74图案化以形成第二层布线77和78。

公开(公告)号：US06853081B2

公开(公告)日：2005-02-08

申请号：US10453611

申请日：2003-06-04

申请人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

发明人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

IPC分类号： H01L21/8242 ,  H01L23/522 ,  H01L23/48 ,  H01L21/44 ,  H01L21/4763 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L27/10852 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

摘要翻译： 根据以下步骤形成半导体器件。 通过CVD法将TiN膜71和W膜72沉积在包括通孔66内部的氧化硅膜64上，然后将氧化硅膜64上的W膜72和TiN膜71回蚀 仅留下通孔66的内部并形成插头73.然后，将TiN膜74，Al合金膜75和Ti膜76沉积在包括插塞73的表面的氧化硅膜64上，通过 溅射法，然后对Ti膜76，Al合金膜75和TiN膜74进行图案化以形成第二层布线77和78。

公开(公告)号：US06605530B2

公开(公告)日：2003-08-12

申请号：US10287616

申请日：2002-11-05

申请人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

发明人： Yoshitaka Nakamura ,  Tsuyoshi Tamaru ,  Naoki Fukuda ,  Hidekazu Goto ,  Isamu Asano ,  Hideo Aoki ,  Keizo Kawakita ,  Satoru Yamada ,  Katsuhiko Tanaka ,  Hiroshi Sakuma ,  Masayoshi Hirasawa

IPC分类号： H01L214763

CPC分类号： H01L27/10852 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

公开(公告)号：US20090145231A1

公开(公告)日：2009-06-11

申请号：US12088046

申请日：2006-09-27

申请人： Kazue Kurihara ,  Hiroshi Sakuma ,  Masashi Mizukami

发明人： Kazue Kurihara ,  Hiroshi Sakuma ,  Masashi Mizukami

IPC分类号： G01H13/00 ,  G01N3/24

CPC分类号： G01N19/04 ,  G01N2203/0025

摘要： A resonance shear measuring method capable of simple and rapid measurement by obtaining a resonance shear curve through Fourier transformation of a damping curve of an oscillation on one side surface of a sample during measurement of shear response from the sample is provided. The method is to measure shear response of the sample sandwiched between the solid surfaces of a resonance shear measurement unit along with a change in film thickness by applying an input signal Uin to a horizontal driving section of the shear resonance measurement unit, by detecting an oscillation on one side surface of the sample sandwiched between solid surfaces of the resonance shear measurement unit as an output signal Uout by means of a displacement gauge, and by applying the output signal Uout along with the input signal Uin to a resonance shear signal analyzer, wherein a damping curve of the oscillation on one side surface of the sample is Fourier transformed by a Fourier transformation section (5B) to obtain a resonance shear curve. Also provided is a twin-path type apparatus for shear stress measurement capable of precise measurement of shear stress by using a twin-path method by which a distance between opaque substrates can be measured.

摘要翻译： 提供一种共振剪切测量方法，其能够通过在从样品的剪切响应测量期间在样品的一个侧表面上的振荡的阻尼曲线通过傅里叶变换获得共振剪切曲线来简单且快速地测量。 该方法是通过将输入信号Uin施加到剪切共振测量单元的水平驱动部分，通过检测振荡来测量夹在共振剪切测量单元的固体表面之间的样品的剪切响应以及膜厚度的变化 在夹持在谐振剪切测量单元的固体表面之间的样品的一个侧表面上，通过位移计将输出信号Uout与输入信号Uin一起施加到谐振剪切信号分析仪，其中， 通过傅立叶变换部（5B）对样品的一个侧面的振动的阻尼曲线进行傅里叶变换，得到共振剪切曲线。 还提供了一种用于剪切应力测量的双路型装置，其能够通过使用可以测量不透明基板之间的距离的双路径方法来精确测量剪切应力。

公开(公告)号：US06724034B2

公开(公告)日：2004-04-20

申请号：US10230107

申请日：2002-08-29

申请人： Shinpei Iijima ,  Hiroshi Sakuma

发明人： Shinpei Iijima ,  Hiroshi Sakuma

IPC分类号： H01L27108

CPC分类号： H01L28/60 ,  H01L21/28518 ,  H01L27/10814 ,  H01L28/55 ,  H01L28/91

摘要： In a semiconductor integrated circuit device, a polycrystalline silicon film is formed along an inner wall of a trench in which a capacitor is to be formed, and the polycrystalline silicon film and a lower electrode is contacted to each other on the entire inner wall of the trench. Oxygen permeated into the lower electrode during a thermal treatment of a tantalum oxide film is consumed at an interface between the polycrystalline silicon film and the lower electrode. Thus, oxygen does not reach the surface of a silicon plug below the lower electrode that would cause oxidation on the surface of the silicon plug and form a high-resistance oxide layer when a dielectric film formed on a lower electrode of a capacitor of a DRAM is subjected to a thermal treatment in an oxygen atmosphere.

摘要翻译： 在半导体集成电路器件中，沿着要形成电容器的沟槽的内壁形成多晶硅膜，并且多晶硅膜和下电极在其整个内壁上彼此接触 沟。 在氧化钽膜的热处理期间，氧气渗入下电极在多晶硅膜和下电极之间的界面消耗。 因此，当形成在DRAM的电容器的下电极上的电介质膜时，氧不会到达下电极下方的硅插塞的表面，这将导致硅插塞的表面上的氧化并形成高电阻的氧化物层 在氧气氛中进行热处理。

公开(公告)号：US06700177B2

公开(公告)日：2004-03-02

申请号：US09867919

申请日：2001-05-29

申请人： Akiyuki Yoshisato ,  Kazuhiko Ueda ,  Hiroshi Sakuma ,  Akihiko Inoue

发明人： Akiyuki Yoshisato ,  Kazuhiko Ueda ,  Hiroshi Sakuma ,  Akihiko Inoue

IPC分类号： H01L2166

CPC分类号： H05K3/403 ,  H01L23/66 ,  H01L24/48 ,  H01L27/016 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/16 ,  H05K3/246 ,  H05K2201/0317 ,  H05K2201/0347 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： In a surface-mounting-type electronic-circuit unit, circuit elements, including capacitors, resistors, and inductive devices, and electrically conductive patterns connected to the circuit elements are formed on an alumina board as thin films. Semiconductor bare chips for a diode and a transistor are wire-bonded to connection lands in electrically conductive patterns. And end-face electrodes connected to grounding electrodes, input electrodes, and output electrodes of electrically conductive patterns are formed at side faces of the alumina board.

摘要翻译： 在表面安装型电子电路单元中，包括电容器，电阻器和电感器件的电路元件以及连接到电路元件的导电图案在氧化铝板上形成为薄膜。 用于二极管和晶体管的半导体裸芯片以导电图案引线接合到连接焊盘。 在氧化铝板的侧面形成有与导电图案的接地电极，输入电极和输出电极连接的端面电极。