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    CONTACT PAD STRUCTURE AND MANUFACTURING METHOD THEREOF
    1.
    发明公开
    CONTACT PAD STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20240363401A1

    公开(公告)日：2024-10-31

    申请号：US18201200

    申请日：2023-05-24

    申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

    发明人： Janbo Zhang ,  Li-Wei Feng

    IPC分类号： H01L21/768 ,  H01L23/528

    CPC分类号： H01L21/76831 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/528

    摘要： A contact pad structure and a manufacturing method thereof are disclosed in the present invention. The contact pad structure includes a substrate, a first dielectric layer, a second dielectric layer, first contact pads, an etching stop layer, a first void, and a second void. The first contact pads are disposed on a first region of the substrate. The first dielectric layer is disposed on the substrate, covers the first contact pads, and includes a recess located between two adjacent first contact pads. The etching stop layer is disposed on the first dielectric layer and partially located in the recess. The second dielectric layer is disposed on the etching stop layer and partially located in the recess. The first void is disposed in the etching stop layer and located in the recess. The second void is disposed in the second dielectric layer and located in the recess.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FORMING SEMICONDUCTOR MEMORY DEVICE
    5.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FORMING SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240268097A1

    公开(公告)日：2024-08-08

    申请号：US18603228

    申请日：2024-03-13

    申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

    发明人： Peng GUO ,  Yuanbao Wang

    IPC分类号： H10B12/00 ,  H01L29/06

    CPC分类号： H10B12/30 ,  H01L29/0649 ,  H10B12/482 ,  H10B12/488

    摘要： A method for fabricating a semiconductor memory device includes: forming word lines and bit lines; forming filling patterns between the bit lines and at ends of the bit lines, and forming first gaps surrounded by the filling patterns and the bit lines; depositing an insulating material, to fill up the first gaps surrounded by the filling patterns and the bit lines, and forming cavities surrounded by the insulating material in each of the first gaps respectively; etching the insulating material to form a strip-shaped isolation structure and columnar isolation structures, where the cavity of the strip-shaped isolation structure is exposed to form a seam; after etching the insulating material, removing a portion of the filling patterns to form second gaps, where the second gaps are surrounded by the columnar isolation structures and the bit lines; and depositing a conductive material to fill up the second gaps and the seam concurrently.

    Semiconductor Memory Device and Method of Fabricating the Same
    6.
    发明公开
    Semiconductor Memory Device and Method of Fabricating the Same 审中-公开

    公开(公告)号：US20240244824A1

    公开(公告)日：2024-07-18

    申请号：US18427852

    申请日：2024-01-31

    申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

    发明人： Ken-Li Chen ,  Yifei Yan ,  Yu-Cheng Tung

    IPC分类号： H10B12/00 ,  H01L29/06

    CPC分类号： H10B12/315 ,  H01L29/0649 ,  H10B12/0335 ,  H10B12/482

    摘要： The present disclosure relates to a semiconductor memory device and a fabricating method thereof, and the semiconductor memory device includes a substrate, bit lines, plugs and a spacer structure. The bit lines are separately disposed on the substrate, and the plugs are also disposed on the substrate to alternately arrange with the bit lines. The spacer structure is disposed on the substrate, between each of the bit lines and each of the plugs. The spacer structure includes a first air gap layer, a first spacer and a second air gap layer, and the first air gap layer, the first spacer and the second air gap layer are sequentially stacked between sidewalls of the bit lines and the plugs. Therefore, two air gap layers may be formed between the bit lines and the storage node contacts to improve the delay between the resistor and the capacitor.

    Semiconductor memory device
    10.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11910595B2

    公开(公告)日：2024-02-20

    申请号：US17408510

    申请日：2021-08-23

    申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

    发明人： Yu-Cheng Tung ,  Janbo Zhang ,  Shih-Han Hung ,  Li-Wei Feng

    IPC分类号： H10B12/00

    CPC分类号： H10B12/482 ,  H10B12/315 ,  H10B12/34

    摘要： The invention discloses a semiconductor memory device, which is characterized by comprising a substrate defining a cell region and an adjacent periphery region, a plurality of bit lines are arranged on the substrate and arranged along a first direction, each bit line comprises a conductive part, and the bit line comprises four sidewalls, and a spacer surrounds the four sidewalls of the bit line, the spacer comprises two short spacers covering two ends of the conductive part, two long spacers covering the two long sides of the conductive part, and a plurality of storage node contact isolations located between any two adjacent bit lines, at least a part of the storage node contact isolations cover directly above the spacers. The structure of the invention can improve the electrical isolation effect, preferably avoid leakage current and improve the quality of components.