公开(公告)号：US20210407936A1

公开(公告)日：2021-12-30

申请号：US17290040

申请日：2020-03-17

申请人： FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.

发明人： Yi-Wang JHAN ,  Yung-Tai HUANG ,  Xin YOU ,  Xiaopei FANG ,  Yu-Cheng TUNG

IPC分类号： H01L23/00 ,  H01L29/417

摘要： A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad (500) is arranged lateral to a first contact pad (420) in an interconnect structure (400). As a result, during fabrication of the interconnect structure (400), the first contact pad (420) will not be present alone in a large bland area, due to the presence of the second contact pad (500). Thus, a pattern feature for the first contact pad (420) will not be over-resolved, increasing formation accuracy of the first contact pad (420) and thus guaranteeing good electrical transmission performance of the resulting interconnect structure (400).

公开(公告)号：US20210272961A1

公开(公告)日：2021-09-02

申请号：US17320244

申请日：2021-05-14

申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Yu-Cheng TUNG ,  Yi-Wang JHAN ,  Yung-Tai HUANG ,  Xiaopei FANG ,  Shaoyi WU ,  Yi-Lei TSENG

IPC分类号： H01L27/108

摘要： A contact structure, contact pad layout and structure, mask combination and manufacturing method thereof is provided in the present invention. Through the connection of tops of at least two contact plugs in the boundary of core region, an integrated contact with larger cross-sectional area is formed in the boundary of core region. Accordingly, the process of forming electronic components on the contact structure in the boundary of core region may be provided with sufficient process window to increase the size of electronic components in the boundary, lower contact resistance, and the electronic component with increased size in the boundary buffer the density difference of circuit patterns between the core region and the peripheral region, thereby improving optical proximity effect and ensuring the uniformity of electronic components on the contact plugs inside the boundary of core region, and avoiding the collapse of electronic components on the contact plug in the boundary.

公开(公告)号：US20240222297A1

公开(公告)日：2024-07-04

申请号：US18602594

申请日：2024-03-12

申请人： FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.

发明人： Yi-Wang JHAN ,  Yung-Tai HUANG ,  Xin YOU ,  Xiaopei FANG ,  Yu-Cheng TUNG

IPC分类号： H01L23/00 ,  H01L21/8234 ,  H01L29/10 ,  H01L29/417

CPC分类号： H01L24/05 ,  H01L21/823462 ,  H01L21/823475 ,  H01L24/03 ,  H01L29/1033 ,  H01L29/41775 ,  H01L2224/036 ,  H01L2224/0508 ,  H01L2224/05099

摘要： A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a plurality of gate conductive patterns on the substrate; an interlayer dielectric layer covering the gate conductive patterns on the substrate; an interconnect structure comprising a contact plug and a first contact pad, the contact plug extending through the interlayer dielectric layer to the substrate, the first contact pad fully covering a top of the contact plug and extending laterally over part of a top surface of the interlayer dielectric layer; and a second contact pad formed on the top surface of the interlayer dielectric layer and spaced apart from a side edge of the first contact pad, wherein the second contact pad is formed and fully overlays on the interlayer dielectric layer and an isolation plug is spaced apart from the first contact pad.

公开(公告)号：US20230260905A1

公开(公告)日：2023-08-17

申请号：US17720286

申请日：2022-04-13

申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Xiaopei FANG ,  Gang-Yi Lin ,  Congcong Wang

IPC分类号： H01L23/528 ,  H01L27/108

CPC分类号： H01L23/5283 ,  H01L27/10805 ,  H01L27/10885

摘要： A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer, and an interconnection structure on the second dielectric layer. The interconnection structure includes at least two lateral extending portions on the second dielectric layer, and a U-shaped portion through the second dielectric layer and a portion of the first dielectric layer and connected between adjacent ends of the two lateral extending portions.

公开(公告)号：US20230049202A1

公开(公告)日：2023-02-16

申请号：US17706613

申请日：2022-03-29

申请人： Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Gang-Yi Lin ,  Yu-Cheng Tung ,  Yi-Wang Jhan ,  Yifei Yan ,  Xiaopei FANG

IPC分类号： H01L21/033 ,  H01L23/528 ,  H01L21/768

摘要： A semiconductor structure, including a plurality of connection patterns disposed on the substrate, and a merged pattern disposed between adjacent two of the connection patterns, wherein the merged pattern includes a first outer line, a central line and a second outer line sequentially arranged along a first direction and connected with each other, and an end surface of the first outer line, an end surface of the central line and an end surface of the second outer line are misaligned along the first direction.