公开(公告)号：US5177594A

公开(公告)日：1993-01-05

申请号：US807802

申请日：1991-12-13

申请人： Dudley A. Chance ,  Evan E. Davidson ,  Timothy R. Dinger ,  David B. Goland ,  David P. Lapotin

发明人： Dudley A. Chance ,  Evan E. Davidson ,  Timothy R. Dinger ,  David B. Goland ,  David P. Lapotin

IPC分类号： H01L23/498 ,  H01L23/64 ,  H01L25/065

CPC分类号： H01L23/642 ,  H01L23/49827 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15312

摘要： A semiconductor package is described for supporting and interconnecting semiconductor chips, each chip having contact lands on a contact surface, the package also including a substrate with a contact surface. An interposer module is disposed between at least one chip's contact surface and the substrate's contact surface. The interposer module has first and second opposed surfaces and a first plurality of contact locations positioned on its first surface which mate with a chip's contact land. A second plurality of contact locations on the interposer modules second surface are positioned to mate with contact lands on the substrate. A set of conductive vias are positioned within the interposer module and connect the first plurality of contact locations with a first subset of the second plurality of contact locations. A distributed capacitance layer is positioned within the interposer and is adjacent to its first surface. Adjacent to the second surface are X and Y lines which can be used to make engineering change interconnections.

摘要翻译： 描述了用于支撑和互连半导体芯片的半导体封装，每个芯片在接触表面上具有接触焊盘，该封装还包括具有接触表面的衬底。 插入器模块设置在至少一个芯片的接触表面和基板的接触表面之间。 插入器模块具有第一和第二相对表面和位于其第一表面上的第一多个接触位置，其与芯片的接触区域配合。 位于插入器模块第二表面上的第二多个接触位置以与衬底上的接触焊盘配合。 一组导电通孔定位在插入器模块内并且将第一多个接触位置与第二多个接触位置的第一子集连接。 分布式电容层位于插入器内并与其第一表面相邻。 与第二表面相邻的是X和Y线，可用于制造工程变更互连。

公开(公告)号：US5169310A

公开(公告)日：1992-12-08

申请号：US757863

申请日：1991-09-11

申请人： Dudley A. Chance ,  David B. Goland ,  Ho-Ming Tong

发明人： Dudley A. Chance ,  David B. Goland ,  Ho-Ming Tong

IPC分类号： H01L21/48 ,  H01L21/50

CPC分类号： H01L21/50 ,  H01L21/4807 ,  H01L21/486

摘要： A hermetic package for an electronic device is manufactured by providing a green glass ceramic body with a green via to produce a workpiece. The workpiece is sintered at a temperature at or above 500.degree. C., while compressing the workpiece at a pressure at or above 100 pounds per square inch, so as to obtain a hermetic package. The green via comprises a mixture of copper and a glass ceramic material with a sufficient volume of glass to produce a hermetic package, yet with sufficient copper to have a suitable electrical conductivity.The hermetic package thus produced comprises a sintered glass ceramic body having an electrically conductive sintered via which is hermetically bonded to the glass ceramic body and which comprises a mixture of an electrically conductive material and a glass ceramic material. The electrically conductive material forms at most 50 volume percent of the via.The workpeice may be sintered in a sintering fixture having a frame and a compensating insert. The compensating insert and frame bound a sintering chamber for accommodating the workpiece. By providing a frame having a thermal expansion coefficient greater than that of the workpiece, and by providing a compensating insert having a thermal expansion coefficient greater than that of the frame, a close fit can be assured between the workpiece and the sintering fixture over a large range of temperatures.

摘要翻译： 通过提供具有绿色通孔的绿色玻璃陶瓷体以制造工件来制造用于电子设备的气密封装。 将工件在等于或高于500℃的温度下烧结，同时在100磅/平方英寸的压力下压缩工件，以获得气密封装。 绿色通孔包括具有足够体积的玻璃的铜和玻璃陶瓷材料的混合物以产生气密封装，但是具有足够的铜以具有合适的导电性。 如此制造的密封包装包括具有导电烧结通孔的烧结玻璃陶瓷体，其通过气密地结合到玻璃陶瓷体并且包括导电材料和玻璃陶瓷材料的混合物。 导电材料形成通孔的至多50体积％。 工件可以在具有框架和补偿插入件的烧结夹具中烧结。 补偿插入物和框架结合用于容纳工件的烧结室。 通过提供具有大于工件的热膨胀系数的热膨胀系数的框架，并且通过提供具有大于框架的热膨胀系数的热膨胀系数的补偿插入件，可以在大的工件和烧结夹具之间确保紧密配合 温度范围

公开(公告)号：US5157477A

公开(公告)日：1992-10-20

申请号：US642180

申请日：1991-01-18

申请人： Dudley A. Chance

发明人： Dudley A. Chance

IPC分类号： H01L23/538 ,  H01L23/64 ,  H05K1/00 ,  H05K1/02 ,  H05K1/11

CPC分类号： H01L23/66 ,  H01L23/5384 ,  H01L23/64 ,  H05K1/0253 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0224 ,  H05K1/0289 ,  H05K1/115 ,  H05K2201/09609 ,  H05K2201/09681 ,  H05K2201/09718

摘要： Electrical impedance matching for through plane connections or vias in a multiplane laminated wiring structure is provided by arranging the vias in patterns conforming to a standard characteristic impedance configuration. The pattern may be a five wire configuration with four vias surrounding the fifth and repeated over the area of the plane.

摘要翻译： 通过将通孔布置成符合标准特征阻抗配置的图案来提供多平面层叠布线结构中的通过平面连接或通孔的电阻抗匹配。 该图案可以是五线配置，其中四个通孔围绕第五个并在平面的区域上重复。

公开(公告)号：US4352184A

公开(公告)日：1982-09-28

申请号：US930617

申请日：1978-08-03

申请人： Dudley A. Chance

发明人： Dudley A. Chance

IPC分类号： H01S3/03

CPC分类号： H01S3/03

摘要： A gas laser body, gas laser, a method of manufacture of gas laser body and a method of manufacturing a gas laser are disclosed. The gas laser body comprises a pair of glass plates with means located there between defining a plurality of communicating gas passages. One of said passages comprises a plasma tube. Electrodes may be formed by depositing metal on one or more said plates with said electrodes lying in one or more passages when said plates and means are assembled. The means may comprise another glass plate which has portions thereof cut away to form the gas passages. Alternatively the means may include one or more glass rods suitably shaped to define the gas passages when located between said first and second plates.

摘要翻译： 公开了一种气体激光器体，气体激光器，气体激光器体的制造方法和气体激光器的制造方法。 气体激光器主体包括一对玻璃板，其间具有限定多个连通气体通道的装置。 所述通道中的一个包括等离子体管。 电极可以通过在一个或多个所述板上沉积金属而形成，当所述板和装置组装时，所述电极位于一个或多个通道中。 该装置可以包括另一个玻璃板，其中其部分被切除以形成气体通道。 或者，装置可以包括一个或多个玻璃棒，其适当地成形为当位于所述第一和第二板之间时限定气体通道。

公开(公告)号：US5194196A

公开(公告)日：1993-03-16

申请号：US418435

申请日：1989-10-06

申请人： Dudley A. Chance ,  David B. Goland ,  Ho-Ming Tong

发明人： Dudley A. Chance ,  David B. Goland ,  Ho-Ming Tong

IPC分类号： H01L23/08 ,  H01L21/48 ,  H01L21/50 ,  H05K1/11 ,  H05K3/40 ,  H05K3/46

CPC分类号： H01L21/50 ,  H01L21/4807 ,  H01L21/486

摘要： A hermetic package for an electronic device is manufactured by providing a green glass ceramic body with a green via to produce a workpiece. The workpiece is sintered at a temperature at or above 500.degree. C., while compressing the workpiece at a pressure at or above 100 pounds per square inch, so as to obtain a hermetic package. The green via comprises a mixture of copper and a glass ceramic material with a sufficient volume of glass to produce a hermetic package, yet with sufficient copper to have a suitable electrical conductivity.The hermetic package thus produced comprises a sintered glass ceramic body having an electrically conductive sintered via which is hermetically bonded to the glass ceramic body and which comprises a mixture of an electrically conductive material and a glass ceramic material. The electrically conductive material forms at most 50 volume percent of the via.The workpiece may be sintered in a sintering fixture having a frame and a compensating insert. The compensating insert and frame bound a sintering chamber for accommodating the workpiece. By providing a frame having a thermal expansion coefficient greater than that of the workpiece, and by providing a compensating insert having a thermal expansion coefficient greater than that of the frame, a close fit can be assured between the workpiece and the sintering fixture over a large range of temperatures.

公开(公告)号：US4489364A

公开(公告)日：1984-12-18

申请号：US337057

申请日：1981-12-31

申请人： Dudley A. Chance ,  Alan Platt ,  Chung W. Ho ,  Sudipta K. Ray

发明人： Dudley A. Chance ,  Alan Platt ,  Chung W. Ho ,  Sudipta K. Ray

IPC分类号： H01L23/52 ,  H01L23/538 ,  H05K1/00 ,  H05K3/22 ,  H05K1/18

CPC分类号： H01L23/5383 ,  H01L23/5382 ,  H05K1/0292 ,  H01L2924/0002 ,  H01L2924/01014 ,  H01L2924/01039 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/0298 ,  H05K2203/175

摘要： A chip carrying module includes a number of engineering change lines buried below the surface of the module. The engineering change lines are interrupted periodically to provide a set of vias extending up to the upper surface of the module between each set of chips where the vias are connected by dumbbell-shaped pads including a narrow link which permits laser deletion or the like. In addition, the dumbbell-shaped pads are located adjacent to the fan-out pads for the chips. Thus, the fan-out pads can be connected to the dumbbell-shaped pads by means of fly-wires. In addition, individual engineering change lines can be connected together to reach every region of the module by connecting a fly-wire from one dumbbell-shaped pad to another. In addition, by deleting the links at such dumbbell-shaped pads, the engineering change connections are limited to the particular path required.

摘要翻译： 芯片承载模块包括埋在模块表面下方的多个工程变换线。 工程变更线周期性地中断，以提​​供在每组芯片之间延伸到模块上表面的一组通孔，其中通孔由包括允许激光删除等的窄链接的哑铃形焊盘连接。 此外，哑铃形垫位于与芯片的扇出焊盘相邻的位置。 因此，扇出垫可以通过飞线连接到哑铃形垫。 此外，通过将来自一个哑铃形垫的飞线连接到另一个，可以将各个工程变换线连接在一起以到达模块的每个区域。 另外，通过删除这种哑铃形焊盘处的链接，工程变更连接被限制到所需的特定路径。

公开(公告)号：US4463059A

公开(公告)日：1984-07-31

申请号：US394014

申请日：1982-06-30

申请人： Somnath Bhattacharya ,  Dudley A. Chance ,  Nicholas G. Koopman ,  Sudipta K. Ray

发明人： Somnath Bhattacharya ,  Dudley A. Chance ,  Nicholas G. Koopman ,  Sudipta K. Ray

IPC分类号： H01L23/52 ,  H01L23/498 ,  H01L23/538 ,  H05K3/24 ,  H05K3/06

CPC分类号： H05K3/244 ,  H01L23/49866 ,  H01L23/538 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/388 ,  Y10T428/12507 ,  Y10T428/12528 ,  Y10T428/12583 ,  Y10T428/12882

摘要： The top surface metallurgy of LSI chip carriers is improved by multiple and phased interface of metal layers which enable such metallurgies to be suitable for joining by solder reflow and wire bonding techniques. The modifications result in separating the solder bonding metallurgy from the fan-out conductor metallurgy with an intermediate layer of a metal such as Cr or Ti which prevents the formation of intermetallic alloys which are mechanically weak or brittle and tend to fracture because of thermal fatigue stresses caused by thermal cycling during either multiple (up to 50) solder bonding reflow operations or operation of the circuit. The fan-out metallurgy conductors are preferably composed of Cr-Cu-Cr layers covered by at least one upper metal layer which is separated from the Cu of the conductor by means of a metal such as phased layers of Cr or Ti deposited before the other upper metal layer or layers. Solder ball bonding surfaces are composed of additional metal in the form of Au, Cu and Ni. The solderless bonding surfaces are composed of a metal selected from Au, Cr, Ti, Al and Co.

公开(公告)号：US4430690A

公开(公告)日：1984-02-07

申请号：US433329

申请日：1982-10-07

申请人： Dudley A. Chance ,  Chung W. Ho ,  Timothy C. Reiley

发明人： Dudley A. Chance ,  Chung W. Ho ,  Timothy C. Reiley

IPC分类号： H01G2/06 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30 ,  H05K3/34 ,  H01G1/01 ,  H01G3/06

CPC分类号： H05K3/3442 ,  H01G4/30 ,  H05K2201/09663 ,  Y02P70/613 ,  Y10T29/435

摘要： A laminated capacitor is joined to the surface of a chip carrier for large scale integrated circuit chips. The capacitor lies adjacent to positions where chips are located. The capacitor includes a plurality of capacitor plates. The capacitor is bonded to the chip carrier with an array of solder bars comprising an elongated strip of metallic material. Each of the bars is connected to a set of the capacitor plates in the laminated capacitor by means of tab connections on the plates, whereby each of the plates is connected by a plurality of tabs to a plurality of the solder bars. Methods of fabrication of the laminated capacitor structure and solder bars are described.

摘要翻译： 叠层电容器连接到用于大规模集成电路芯片的芯片载体的表面。 电容器位于芯片位置附近。 电容器包括多个电容器板。 电容器通过包括细长的金属材料条的焊料棒阵列结合到芯片载体上。 每个棒通过板上的接头连接件连接到层压电容器中的一组电容器板，由此每个板通过多个接片连接到多个焊料条。 描述了层压电容器结构和焊料棒的制造方法。

公开(公告)号：US4328530A

公开(公告)日：1982-05-04

申请号：US164119

申请日：1980-06-30

申请人： Christopher H. Bajorek ,  Dudley A. Chance ,  Chung W. Ho ,  David A. Thompson

发明人： Christopher H. Bajorek ,  Dudley A. Chance ,  Chung W. Ho ,  David A. Thompson

IPC分类号： H05K1/18 ,  H01L23/538 ,  H01L23/64 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16 ,  H05K3/46

CPC分类号： H05K1/162 ,  H01L23/5383 ,  H01L23/642 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L23/142 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/185 ,  H05K2201/10015 ,  H05K3/4611 ,  H05K3/4629

摘要： A module carrying microcircuit LSI chips includes stacks of parallel ceramic sheets carrying thin capacitor plates laminated in a ceramic structure in which the capacitor plates either serve (1) as the power distribution conductors known as power planes or (2) are connected to power conducting vias which pass through the capacitor plates. Those vias connect to the appropriate capacitor plates electrically, thereby locating the capacitance required as close as possible to the solder bonds between the chips and the carrier. Stacks of laminated ceramic capacitors serving as power planes can be inserted into slots in laminated ceramic sheets providing the first arrangement above. Signal vias are provided about the periphery of the power planes. A highly parallel distribution of current is provided by means of horizontal power conducting straps which reduce voltage fluctuations, electrical resistance, and current per via.

摘要翻译： 携带微电路LSI芯片的模块包括层叠在陶瓷结构中的薄电容器板的平行陶瓷片的堆叠，其中电容器板用作（1）作为被称为电源层的配电导体，或（2）连接到电力导通通孔 其通过电容器板。 那些通孔电连接到适当的电容器板，从而将所需的电容尽可能靠近芯片和载体之间的焊料定位。 作为电源层的层叠陶瓷电容器的叠层可以插入到提供上述第一布置的层叠陶瓷片的槽中。 围绕电源平面的周边提供信号通路。 通过水平电力传导带提供电流的高度平行分布，其降低电压波动，电阻和每个通孔的电流。

公开(公告)号：US5292477A

公开(公告)日：1994-03-08

申请号：US965149

申请日：1992-10-22

申请人： Dudley A. Chance ,  David B. Goland ,  Srinivasa S. N. Reddy ,  Subhash L. Shinde ,  Donald R. Wall

发明人： Dudley A. Chance ,  David B. Goland ,  Srinivasa S. N. Reddy ,  Subhash L. Shinde ,  Donald R. Wall

IPC分类号： H01L23/13 ,  C22C1/04 ,  H01L23/12 ,  H01L23/15 ,  H01L23/498 ,  B22F7/00

CPC分类号： C22C1/0466 ,  C22C1/0425 ,  H01L23/49883 ,  H01L2924/0002 ,  H01L2924/09701

摘要： Methods of fabricating powders of electrically conductive particles supersaturated with grain growth control additives are described. A molten admixture of an electrically conductive material and a grain growth control additive is atomized by spraying an inert atmosphere forming fine molten particles which rapidly cool to form solid particles which are supersaturated with the grain growth control additive. The supersaturated particles are heated to form an electrical conductor having grain sizes less than about 25 microns. The supersaturated particles can be combined with a binder to form an electrical conductor forming paste. Patterns of the paste can be embedded in a green ceramic which can be sintered to form a semiconductor chip packaging substrate having electrical conductors with controlled grain size. During sintering of the combination of ceramic precursor and conductor forming paste, the grain growth control additive results in a substantially void free and crack free via filled with metal having a fine grain morphology.

摘要翻译： 描述了用晶粒生长控制添加剂过饱和的导电颗粒的粉末的制造方法。 导电材料和晶粒生长控制添加剂的熔融混合物通过喷雾形成精细熔融颗粒的惰性气氛而雾化，其迅速冷却以形成与晶粒生长控制添加剂过饱和的固体颗粒。 过饱和颗粒被加热以形成具有小于约25微米的颗粒尺寸的电导体。 过饱和颗粒可与粘合剂组合以形成电导体形成浆料。 糊状物的图案可以嵌入生坯陶瓷中，该陶瓷可以被烧结以形成具有受控晶粒尺寸的电导体的半导体芯片封装基板。 在陶瓷前体和导体形成膏的组合的烧结期间，晶粒生长控制添加剂通过填充有具有细晶粒形态的金属而导致基本上无空隙和无裂纹。