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    METHOD FOR FABRICATING AN ISOLATION STRUCTURE
    3.
    发明申请
    METHOD FOR FABRICATING AN ISOLATION STRUCTURE 有权
    制造隔离结构的方法

    公开(公告)号：US20130171803A1

    公开(公告)日：2013-07-04

    申请号：US13775907

    申请日：2013-02-25

    Applicant: Tze-Liang LEE ,  Pei-Ren JENG ,  Chu-Yun FU ,  Chyi Shyuan CHERN ,  Jui-Hei HUANG ,  Chih-Tang PENG ,  Hao-Ming LIEN

    Inventor： Tze-Liang LEE ,  Pei-Ren JENG ,  Chu-Yun FU ,  Chyi Shyuan CHERN ,  Jui-Hei HUANG ,  Chih-Tang PENG ,  Hao-Ming LIEN

    IPC: H01L21/762

    CPC classification number: H01L21/76224 ,  H01L21/76232

    Abstract: A method of fabricating an isolation structure including forming a trench in a top surface of a substrate and partially filling the trench with a first oxide, wherein the first oxide is a pure oxide. Partially filling the trench includes forming a liner layer in the trench and forming the first oxide over the liner layer using silane and oxygen precursors at a pressure less than 10 milliTorr (mTorr) and a temperature ranging from about 500° C. to about 1000° C. The method further includes producing a solid reaction product in a top portion of the first oxide. The method further includes sublimating the solid reaction product by heating the substrate in a chamber at a temperature from 100° C. to 200° C. and removing the sublimated solid reaction product by flowing a carrier gas over the substrate. The method further includes filling the trench with a second oxide.

    Abstract translation: 一种制造隔离结构的方法，包括在衬底的顶表面中形成沟槽并用第一氧化物部分地填充沟槽，其中第一氧化物是纯氧化物。 部分地填充沟槽包括在沟槽中形成衬层，并且在低于10毫托（mTorr）的压力和约500℃至约1000℃的温度下使用硅烷和氧前体在衬层上形成第一氧化物 该方法还包括在第一氧化物的顶部产生固体反应产物。 该方法还包括通过在室内在100℃至200℃的温度下加热基底来升华固体反应产物，并通过使载气流过基底而除去升华的固体反应产物。 该方法还包括用第二氧化物填充沟槽。

    Slurry dispenser for chemical mechanical polishing (CMP) apparatus and method
    7.
    发明授权
    Slurry dispenser for chemical mechanical polishing (CMP) apparatus and method 有权
    用于化学机械抛光（CMP）设备和方法的浆料分配器

    公开(公告)号：US08277286B2

    公开(公告)日：2012-10-02

    申请号：US12370662

    申请日：2009-02-13

    Applicant: Kun-Ku Hung ,  Zin-Chang Wei ,  Huang Soon Kang ,  Chyi-Shyuan Chern

    Inventor： Kun-Ku Hung ,  Zin-Chang Wei ,  Huang Soon Kang ,  Chyi-Shyuan Chern

    IPC: B24B1/00 ,  B24B57/02 ,  B24B29/00

    CPC classification number: B24B57/02 ,  B24B37/04

    Abstract: A chemical mechanical polishing method and apparatus provides a deformable, telescoping slurry dispenser arm coupled to a dispenser head that may be arcuate in shape and may also be a bendable telescoping member that can be adjusted to vary the number of slurry dispenser ports and the degree of curvature of the dispenser head. The dispenser arm may additionally include slurry dispenser ports therein. The dispenser arm may advantageously be formed of a plurality of nested tubes that are slidable with respect to one another. The adjustable dispenser arm may pivot about a pivot point and can be variously positioned to accommodate different sized polishing pads used to polish substrates of different dimensions and the bendable, telescoping slurry dispenser arm and dispenser head provide uniform slurry distribution to any of various wafer polishing locations, effective slurry usage and uniform polishing profiles in each case.

    Abstract translation: 化学机械抛光方法和装置提供了可变形的，可伸缩的浆料分配器臂，其联接到分配器头部，其可以是弓形的形状，并且还可以是可弯曲的伸缩构件，其可以被调节以改变浆料分配器端口的数量和 分配头的曲率。 分配器臂可以另外包括其中的浆料分配器端口。 分配器臂可以有利地由可相对于彼此滑动的多个嵌套管形成。 可调节的分配器臂可围绕枢转点枢转并且可以被不同地定位以适应用于抛光不同尺寸的基板的不同尺寸的抛光垫，并且可弯曲的可伸缩浆料分配器臂和分配器头部向各种晶片抛光位置 ，有效的浆料使用和均匀的抛光轮廓在每种情况下。

    METHOD FOR FABRICATING AN ISOLATION STRUCTURE
    8.
    发明申请
    METHOD FOR FABRICATING AN ISOLATION STRUCTURE 有权
    制造隔离结构的方法

    公开(公告)号：US20100291751A1

    公开(公告)日：2010-11-18

    申请号：US12774219

    申请日：2010-05-05

    Applicant: Tze-Liang LEE ,  Pei-Ren JENG ,  Chu-Yun FU ,  Chyi Shyuan CHERN ,  Jui-Hei HUANG ,  Chih-Tang PENG ,  Hao-Ming LIEN

    Inventor： Tze-Liang LEE ,  Pei-Ren JENG ,  Chu-Yun FU ,  Chyi Shyuan CHERN ,  Jui-Hei HUANG ,  Chih-Tang PENG ,  Hao-Ming LIEN

    IPC: H01L21/762

    CPC classification number: H01L21/76224 ,  H01L21/76232

    Abstract: The invention relates to integrated circuit fabrication, and more particularly to an electronic device with an isolation structure made having almost no void. An exemplary method for fabricating an isolation structure, comprising: providing a substrate; forming a trench in the substrate; partially filling the trench with a first silicon oxide; exposing a surface of the first silicon oxide to a vapor mixture comprising NH3 and a fluorine-containing compound; heating the substrate to a temperature between 100° C. to 200° C.; and filling the trench with a second silicon oxide, whereby the isolation structure made has almost no void.

    Abstract translation: 本发明涉及集成电路制造，更具体地说涉及具有几乎没有空隙的隔离结构的电子器件。 一种用于制造隔离结构的示例性方法，包括：提供衬底; 在衬底中形成沟槽; 用第一氧化硅部分地填充沟槽; 将第一氧化硅的表面暴露于包含NH 3和含氟化合物的蒸汽混合物中; 将基板加热至100℃至200℃的温度; 并用第二氧化硅填充沟槽，由此所制成的隔离结构几乎没有空隙。

    Method of fabricating high-k metal gate devices
    9.
    发明授权
    Method of fabricating high-k metal gate devices 有权
    制造高k金属栅极器件的方法

    公开(公告)号：US07776757B2

    公开(公告)日：2010-08-17

    申请号：US12354394

    申请日：2009-01-15

    Applicant: Simon Su-Horng Lin ,  Yu-Ming Lee ,  Shao-Yen Ku ,  Chi-Ming Yang ,  Chyi-Shyuan Chern ,  Chin-Hsiang Lin

    Inventor： Simon Su-Horng Lin ,  Yu-Ming Lee ,  Shao-Yen Ku ,  Chi-Ming Yang ,  Chyi-Shyuan Chern ,  Chin-Hsiang Lin

    IPC: H01L21/302

    CPC classification number: H01L21/31111 ,  H01L21/28088 ,  H01L21/823857 ,  H01L29/517

    Abstract: The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first silicon layer by an in-situ deposition process, patterning the first silicon layer to remove a portion overlying the second region, patterning the first metal layer using the patterned first silicon layer as a mask, and removing the patterned first silicon layer including applying a solution. The solution includes a first component having an [F-] concentration greater than 0.01M, a second component configured to adjust a pH of the solution from about 4.3 to about 6.7, and a third component configured to adjust a potential of the solution to be greater than −1.4 volts.

    Abstract translation: 本公开提供了一种用于制造半导体器件的方法。 该方法包括提供具有第一区域和第二区域的半导体衬底，在半导体衬底上形成高k电介质层，通过原位沉积工艺形成第一金属层和第一硅层，图案化第一硅 以去除覆盖在第二区域上的部分，使用图案化的第一硅层作为掩模来图案化第一金属层，以及去除图案化的第一硅层，包括施加溶液。 该溶液包括具有大于0.01M的[F-]浓度的第一组分，构成为将溶液的pH调节至约4.3至约6.7的第二组分，以及构成为将溶液的电位调节为 大于-1.4伏。

    High selectivity etching process for metal gate N/P patterning
    10.
    发明授权
    High selectivity etching process for metal gate N/P patterning 失效
    金属栅N / P图案化的高选择性蚀刻工艺

    公开(公告)号：US07732344B1

    公开(公告)日：2010-06-08

    申请号：US12478922

    申请日：2009-06-05

    Applicant: Fang Wen Tsai ,  Matt Yeh ,  Ming-Jun Wang ,  Shun Wu Lin ,  Chi-Chun Chen ,  Zin-Chang Wei ,  Chyi-Shyuan Chern

    Inventor： Fang Wen Tsai ,  Matt Yeh ,  Ming-Jun Wang ,  Shun Wu Lin ,  Chi-Chun Chen ,  Zin-Chang Wei ,  Chyi-Shyuan Chern

    IPC: H01L21/302

    CPC classification number: H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  Y10S438/942

    Abstract: A method for fabricating a integrated circuit with improved performance is disclosed. The method comprises providing a substrate; forming a hard mask layer over the substrate; forming protected portions and unprotected portions of the hard mask layer; performing a first etching process, a second etching process, and a third etching process on the unprotected portions of the hard mask layer, wherein the first etching process partially removes the unprotected portions of the hard mask layer, the second etching process treats the unprotected portions of the hard mask layer, and the third etching process removes the remaining unprotected portions of the hard mask layer; and performing a fourth etching process to remove the protected portions of the hard mask layer.

    Abstract translation: 公开了一种制造具有改进性能的集成电路的方法。 该方法包括提供基底; 在衬底上形成硬掩模层; 形成硬掩模层的受保护部分和未保护部分; 对硬掩模层的未保护部分进行第一蚀刻工艺，第二蚀刻工艺和第三蚀刻工艺，其中第一蚀刻工艺部分地去除硬掩模层的未保护部分，第二蚀刻工艺处理未保护部分 的硬掩模层，并且第三蚀刻工艺除去硬掩模层的剩余的未保护部分; 以及执行第四蚀刻工艺以去除所述硬掩模层的被保护部分。

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