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公开(公告)号：US4672738A
公开(公告)日：1987-06-16
申请号：US776161
申请日：1985-09-13
IPC分类号： H01L21/033 , H01L21/22 , H01L21/265 , H01L21/266 , H01L29/06 , H01L29/74
CPC分类号： H01L21/0334 , H01L21/266 , H01L29/0615 , H01L29/0688 , Y10S148/01 , Y10S438/965
摘要： A method for the manufacture of a pn junction having a high breakdown voltage at the boundary surface of a semiconductor body, utilizing a mask which has a relatively large opening for introducing a dopant therethrough into the semiconductor body, the mask having a marginal edge which extends laterally beyond the edge of the relatively large opening. In the marginal edge, the mask is provided with smaller, auxiliary openings, the openings being sized and spaced such that lesser amounts of dopant pass through the opening as the distance of the auxiliary openings from the edge of the relatively larger opening increases. Upon introducing the dopant into the semiconductor body through the mask, there is generated a doping profile which gradually approaches the boundary surface with increasing distance from the edge of the relatively large opening.
摘要翻译： 一种用于制造在半导体本体的边界表面具有高击穿电压的pn结的方法，利用具有相对较大的开口的掩模，用于将掺杂剂引入到半导体本体中，所述掩模具有延伸的边缘 横向超过相对较大开口的边缘。 在边缘处，掩模设置有较小的辅助开口，开口的尺寸和间隔使得当辅助开口距相对较大开口的边缘的距离增加时，较少量的掺杂剂通过开口。 当通过掩模将掺杂剂引入半导体本体时，产生掺杂分布，其随着距离相对大的开口的边缘的距离增加而逐渐接近边界表面。
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公开(公告)号：US4578595A
公开(公告)日：1986-03-25
申请号：US664485
申请日：1984-10-24
IPC分类号： H01L27/144 , H01L29/74 , H03K17/13 , H03K17/725 , H03K17/78 , H03K17/79 , H03K17/60 , H03K3/45 , H03K17/687
CPC分类号： H03K17/136 , H01L27/1443 , H03K17/79 , Y10T307/773
摘要： A circuit arrangement for drive of a thyristor with light comprises a zero pause control which permits an ignition of a thyristor only in a proximity of a zero point of the thyristor voltage. The control contains an IGFET which transports away a base current of the phototransistor effecting ignition when the thyristor voltage exceeds a specific value. The gate terminal of the IGFET connects to an alternating voltage via a photodiode. The zero point control can only be activated when the photodiode is illuminated.
摘要翻译： 用于驱动具有光的晶闸管的电路装置包括零暂停控制，其允许仅在晶闸管电压的零点附近的晶闸管点火。 该控制器包含IGFET，当晶闸管电压超过特定值时，传输掉光电晶体管的基极电流，从而产生点火。 IGFET的栅极端子通过光电二极管连接到交流电压。 零点控制只有在光电二极管被点亮时才能被激活。
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公开(公告)号：US5132766A
公开(公告)日：1992-07-21
申请号：US598572
申请日：1990-10-16
申请人： Jenoe Tihanyi , Christine Fellinger
发明人： Jenoe Tihanyi , Christine Fellinger
IPC分类号： H01L29/78 , H01L29/08 , H01L29/68 , H01L29/739
CPC分类号： H01L29/0834 , H01L29/7395
摘要： A bipolar transistor is disclosed including a semiconductor body having a cathode-side surface and an anode-side surface, and at least one insulated gate electrode. The semiconductor body has a central region with a predetermined doping concentration and of a first conductivity type. The central region borders on the cathode-side surface of the semiconductor body. Bordering on the cathode-side surface, at least one gate region is provided which borders on the central region. The gate region is of the second conductivity type and has a higher doping concentration than the central region. In the gate region, a source region is provided which borders on the cathode-side surface. The gate electrode is seated on an insulating layer applied on the cathode-side surface and covers the gate region. Between the anode-side surface and the central region is provided an anode region of the second conductivity type which has a higher doping concentration than the central region. Between gate region and source region, a shunt is provided. The anode region is a recrystallized region of a metal silicon alloy doped with a doping substance.
摘要翻译： 公开了一种双极晶体管，其包括具有阴极侧表面和阳极侧表面的半导体本体和至少一个绝缘栅电极。 半导体本体具有预定的掺杂浓度和第一导电类型的中心区域。 中心区域与半导体本体的阴极侧表面相接。 在阴极侧表面附近，提供至少一个栅极区域，其邻接在中心区域上。 栅极区域具有第二导电类型并且具有比中心区域更高的掺杂浓度。 在栅极区域中，提供与阴极侧表面相接的源极区域。 栅电极位于施加在阴极侧表面上并覆盖栅极区域的绝缘层上。 在阳极侧表面和中心区域之间提供了具有比中心区域更高的掺杂浓度的第二导电类型的阳极区域。 在栅极区域和源极区域之间，提供分流。 阳极区域是掺杂有掺杂物质的金属硅合金的再结晶区域。
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公开(公告)号：US4633292A
公开(公告)日：1986-12-30
申请号：US828575
申请日：1986-02-10
IPC分类号： H01L29/41 , H01L21/331 , H01L29/06 , H01L29/40 , H01L29/73 , H01L29/78 , H01L29/861
CPC分类号： H01L29/404 , H01L29/7802
摘要： Planar semiconductor component which has a substrate of one conduction type, and a contact-connected zone of opposite conductivity type embedded in the surface of the substrate in planar fashion and having a part thereof emerging to the surface. It also has a control electrode covering that part of the contact-connected contacted zone which emerges to the surface, an insulating layer on the surface, an edge electrode seated on the insulating layer at the edge of the substrate and electrically connected to the substrate, and at least one protective ring zone of the opposite conductivity type positioned between the edge of the substrate and the contact-connected zone and embedded in planar fashion in the surface. The ring zone includes at least one conducting layer completely covering a part of the substrate emerging to the surface between the protective ring zone and the contacted zone, wherein the conducting layer is electrically insulated from the emerging part of the substrate, and electrically contacted by one of the contact-connected protective ring zones embedded in planar fashion in the substrate surface.
摘要翻译： 平面半导体部件具有一个导电型的衬底和相对导电类型的接触连接区域，其以平面方式嵌入到衬底的表面中，并且其一部分露出到表面。 它还具有一个控制电极，其覆盖出现在表面上的接触接触区域的一部分，表面上的绝缘层，位于衬底边缘处的绝缘层上的边缘电极，并电连接到衬底， 以及位于基板的边缘和接触连接区域之间的相反导电类型的至少一个保护环区域，并且以平面方式嵌入在表面中。 环区包括至少一个导电层，其完全覆盖出现在保护环区域和接触区域之间的表面的衬底的一部分，其中导电层与衬底的出现部分电绝缘，并与一个电接触 的接触连接的保护环区域以平面方式嵌入衬底表面。
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5.发明授权Integrable buffer circuit for voltage level conversion having clamping means 失效具有钳位装置的用于电压电平转换的可积分缓冲电路
公开(公告)号：US4801824A
公开(公告)日：1989-01-31
申请号：US76255
申请日：1987-07-21
IPC分类号： H03K17/687 , H03K19/0185 , H03K19/0948 , H03K17/10 , H03K5/04 , H03K17/16
CPC分类号： H03K19/09482 , H03K19/018507
摘要： A signal voltage (E) based upon a supply voltage must be converted to a signal voltage (A) with ground reference so as to enable further processing in a logic circuit. A simple level converter comprises a series connection of a MOSFET (T1) connected to the supply voltage; the MOSFET also comprises a resistor (T2). The source terminal of the MOSFET (T1) is located at the potential of the supply voltage. The voltage to be converted is applied between the gate terminal and the source terminal, and the converted voltage occurs at the resistor (T2). The two voltages are each limited by one Zener diode (D2, D1).
摘要翻译： 基于电源电压的信号电压（E）必须被转换为具有接地参考的信号电压（A），以便能够在逻辑电路中进一步处理。 简单的电平转换器包括连接到电源电压的MOSFET（T1）的串联连接; MOSFET还包括电阻器（T2）。 MOSFET（T1）的源极端子位于电源电压的电位。 要转换的电压施加在栅极端子和源极端子之间，转换的电压发生在电阻器（T2）处。 两个电压都由一个齐纳二极管（D2，D1）限制。
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公开(公告)号：US4730228A
公开(公告)日：1988-03-08
申请号：US886577
申请日：1986-07-16
CPC分类号： G01K7/01 , G01K3/005 , H01L2924/0002 , Y10S323/907 , Y10T307/773
摘要： The temperature of the power semiconductor component is sensed by a bipolar transistor. The bipolar transistor is in series with a depletion mode MOSFET whose gate and source electrodes are connected together. The drain electrode is also connected to a threshold element. Normally, the FET has low impedance, so that at the input of the threshold element source potential, e.g. ground potential, is present. With current rising as a function of temperature, the current through the FET is limited to a constant, essentially temperature-independent value, and the potential at the input of the threshold element rises steeply. This condition is detected as an overtemperature signal.
摘要翻译： 功率半导体部件的温度由双极晶体管感测。 双极晶体管与其栅极和源极电极连接在一起的耗尽型MOSFET串联。 漏极电极也连接到阈值元件。 通常，FET具有低阻抗，使得在阈值元件源电位的输入处，例如， 地面电位存在。 随着电流随温度的升高而升高，通过FET的电流被限制在恒定的本质上与温度无关的值，并且阈值元件输入端的电位急剧上升。 该条件被检测为过热信号。
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公开(公告)号：US4728826A
公开(公告)日：1988-03-01
申请号：US886576
申请日：1986-07-16
IPC分类号： H03K17/04 , H03K17/0412 , H03K17/08 , H03K17/687 , H03K17/695
CPC分类号： H03K17/04123 , H03K17/687
摘要： The voltage peaks occuring upon disconnection of inductive loads are normally attenuated by a by-pass diode connected in parallel with the load. The driving countervoltage is thereby limited to the value of the forward voltage drop of the diode. For a power MOSFET with a source-side inductive load, the driving countervoltage is increased by placing a series connection of an additional MOSFET and a Zener diode between the gate of the power MOSFET and the connection of the load which is remote from the power MOSFET. The driving countervoltage at the source now becomes the Zener voltage plus the occuring gate-source voltage of the power MOSFET.
摘要翻译： 电感负载断开时出现的电压峰值通常与负载并联连接的旁路二极管衰减。 因此驱动逆变电压被限制为二极管正向压降的值。 对于具有源极电感负载的功率MOSFET，通过在功率MOSFET的栅极和远离功率MOSFET的负载的连接之间放置附加MOSFET和齐纳二极管的串联连接来提高驱动反电压 。 源极的驱动反电压现在变成齐纳电压加功率MOSFET的栅极 - 源极电压。
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公开(公告)号：US4691129A
公开(公告)日：1987-09-01
申请号：US886578
申请日：1986-07-16
IPC分类号： H03K17/00 , H03K17/0812 , H03K17/16 , H03K17/687 , G05F1/40 , H02H7/00 , H03K3/01
CPC分类号： H03K17/687 , H03K17/08122 , H03K17/165
摘要： When a power MOSFET operated as a source follower is driven by an electronic switch, an interruption of the connection between ground and the electronic switch may result in the output potential of the electronic switch to change so that the power MOSFET is partially switched on. This causes a considerable amount of power dissipation. Therefore, there is placed between the source and gate electrodes of the MOSFET a depletion MOSFET whose gate is connected to the terminal of the electronic switch intended for connection to ground. Thus, the power MOSFET remains non-conducting upon interruption of the connection between the electronic switch and ground.
摘要翻译： 当作为源极跟随器工作的功率MOSFET由电子开关驱动时，接地和电子开关之间的连接中断可能导致电子开关的输出电位发生变化，从而使功率MOSFET部分接通。 这导致相当大的功率消耗。 因此，放置在MOSFET的源极和栅极电极之间，其栅极连接到用于连接到地的电子开关的端子的耗尽MOSFET。 因此，功率MOSFET在电子开关和地之间的连接断开时保持不导通。
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公开(公告)号：US4688071A
公开(公告)日：1987-08-18
申请号：US663363
申请日：1984-10-22
IPC分类号： H03K17/78 , H01L27/144 , H01L27/146 , H01L31/10 , H03K17/79 , H03K17/795 , H01L27/02
CPC分类号： H03K17/79 , H01L27/1443 , H03K17/7955 , H01L2224/48091 , H01L2224/4813 , H01L2224/48464 , H01L2924/1301 , H01L2924/13091
摘要： In a circuit arrangement having a phototransistor, in order to increase the inverse voltage strength of the phototransistor, a resistor that carries off the collector-base inverse current generally lies between the base zone and the emitter zone of the phototransistor. This resistor should be as large as possible given illumination in order to increase the current gain. The resistor according to the invention is formed by the drain-source path of an IGFET of depletion type whose gate terminal is at a fixed potential. The IGFET is conductive in the unilluminated condition of the phototransistor. During illumination, its resistance increases given an increasing photocurrent.
摘要翻译： 在具有光电晶体管的电路装置中，为了提高光电晶体管的反向电压强度，传导集电极 - 反向电流的电阻通常位于光电晶体管的基极区域和发射极区域之间。 为了增加电流增益，该电阻应该尽可能大，以给定照明。 根据本发明的电阻器由其栅极端子处于固定电位的耗尽型IGFET的漏极 - 源极路径形成。 IGFET在光电晶体管的未发光状态下是导电的。 在照明期间，随着光电流的增加，其电阻增加。
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公开(公告)号：US4677325A
公开(公告)日：1987-06-30
申请号：US872354
申请日：1986-06-09
IPC分类号： H03K17/687 , H03K19/0944 , H03K19/0948 , H03K17/16 , H03K19/094 , H03K19/20
CPC分类号： H03K17/6872 , H03K19/09446 , H03K19/0948
摘要： A switching circuit includes two series-connected MOSFET (1, 6) complementing one another, which are interconnected at the drain terminal of each device. The gate terminal of the MOSFET that is grounded is connected to a control input terminal (E). This gate terminal is also connected to the source terminal of a depletion FET (7). The drain terminal of the depletion FET (7) is connected to the gate terminal of the second MOSFET (6) and, in turn, is connected via a resistor (8) to a voltage source (+U). The gate terminal of the depletion FET (7) is grounded. The load (5) is then connected to the drain side of the complementary MOSFET. When the switch is in a blocking condition, the cross current is thus prevented from flowing; and the FET connected to voltage can be completely activated.
摘要翻译： 开关电路包括彼此互补的两个串联连接的MOSFET（1,6），它们在每个器件的漏极端子处互连。 接地的MOSFET的栅极端子连接到控制输入端子（E）。 该栅极端子也连接到耗尽FET（7）的源极端子。 耗尽FET（7）的漏极端子连接到第二MOSFET（6）的栅极端子，并且又通过电阻器（8）连接到电压源（+ U）。 耗尽FET（7）的栅极端子接地。 负载（5）然后连接到互补MOSFET的漏极侧。 当开关处于阻塞状态时，防止交叉电流流动; 连接到电压的FET可以被完全激活。
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