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公开(公告)号:US12170302B2
公开(公告)日:2024-12-17
申请号:US18166560
申请日:2023-02-09
Inventor: Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146
Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.
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公开(公告)号:US12166048B2
公开(公告)日:2024-12-10
申请号:US18308014
申请日:2023-04-27
Inventor: Feng-Chien Hsieh , Yun-Wei Cheng , Kuo-Cheng Lee , Cheng-Ming Wu
IPC: H01L27/146 , H04N5/33 , H04N23/10 , H04N25/76
Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.
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公开(公告)号:US12164034B2
公开(公告)日:2024-12-10
申请号:US17249969
申请日:2021-03-19
Inventor: Feng-Chien Hsieh , Yun-Wei Cheng , Kuo-Cheng Lee , Cheng-Ming Wu
IPC: G01S17/894 , H01L27/146
Abstract: A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.
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公开(公告)号:US12113042B2
公开(公告)日:2024-10-08
申请号:US17450104
申请日:2021-10-06
Inventor: Chun-Liang Lu , Wei-Lin Chen , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L23/00
CPC classification number: H01L24/73 , H01L24/11 , H01L24/17 , H01L2224/11466 , H01L2224/11845 , H01L2224/1703 , H01L2224/73104 , H01L2224/9211
Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first wafer including a first metal structure within a body of the first wafer. The semiconductor structure also includes a second wafer including a second metal structure within a body of the second wafer, where the first wafer is coupled to the second wafer at an interface. The semiconductor structure further includes a metal bonding structure coupled to the first metal structure and the second metal structure and extending through the interface.
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75.
公开(公告)号:US12068246B2
公开(公告)日:2024-08-20
申请号:US16201925
申请日:2018-11-27
Inventor: Cheng-Yuan Li , Kuo-Cheng Lee , Yun-Wei Cheng , Yen-Liang Lin
IPC: H01L23/528 , H01L23/00 , H01L23/522 , H01L23/544
CPC classification number: H01L23/528 , H01L23/5226 , H01L23/544 , H01L24/09 , H01L2223/54426 , H01L2224/0231 , H01L2224/02331 , H01L2224/02373
Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.
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公开(公告)号:US20240105750A1
公开(公告)日:2024-03-28
申请号:US18110843
申请日:2023-02-16
Inventor: Ming-Hsien YANG , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14621 , H01L27/14627 , H01L27/14645
Abstract: A CMOS image sensor includes PDAF pixels distributed in an array of image pixels in plan view. Each PDAF pixel includes m×m binned photodiodes, a PDAF color filter overlying the binned photodiodes and laterally surrounded by a first isolation structure, and a PDAF micro-lens overlying the PDAF color filter. A first horizontal distance between a center of the PDAF color filter and a center of the binned photodiodes varies depending on a location of the PDAF pixel in plan view in the CMOS image sensor. Additionally, the first isolation structure includes a first low-n dielectric grid, a second low-n dielectric grid underlying the first low-n dielectric grid, and a metal grid enclosed by the second low-n dielectric grid. The second low-n dielectric grid includes a filler dielectric material different from a second low-n dielectric grid material. Thus, quantum efficiency and uniformity of the CMOS image sensor are improved.
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公开(公告)号:US20240030262A1
公开(公告)日:2024-01-25
申请号:US18183574
申请日:2023-03-14
Inventor: Po Chun Chang , Ping-Hao Lin , Kun-Hui Lin , Kuo-Cheng Lee
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14689
Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a number of pixels and neighboring pixels are isolated by deep trench isolation structures. In an embodiment, a method of forming the semiconductor structure includes epitaxially growing a p-type semiconductor layer on a substrate, epitaxially growing an n-type semiconductor layer over the p-type semiconductor layer, after the epitaxially growing of the n-type semiconductor layer, forming a p-type well in the n-type semiconductor layer, forming an n-type doped region in the n-type semiconductor layer and surrounded by the p-type well, forming a first trench extending through the n-type semiconductor layer and the p-type semiconductor layer and surrounding the p-type well, and forming a first isolation structure in the first trench.
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公开(公告)号:US20230402482A1
公开(公告)日:2023-12-14
申请号:US17892846
申请日:2022-08-22
Inventor: Feng-Chien Hsieh , Yun-Wei Cheng , Ping Kuan Chang , Kuo-Cheng Lee , Cheng-Ming Wu
IPC: H01L27/146 , H01L31/0216 , H01L31/054 , H01L31/02 , H01L25/04
CPC classification number: H01L27/14636 , H01L31/02168 , H01L27/14685 , H01L31/054 , H01L31/18 , H01L27/1469 , H01L27/14634 , H01L25/043 , H01L31/02008
Abstract: The present disclosure provides an integrated circuit (IC) structure with a solar cell and an image sensor array. An integrated structure according to the present disclosure includes a first substrate including a plurality of photodiodes, an interconnect structure disposed on the first substrate, a first bonding layer disposed on the interconnect structure, a second bonding layer disposed on the first bonding layer, a second substrate disposed on the second bonding layer, and a transparent conductive oxide layer disposed on the second substrate.
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公开(公告)号:US11784198B2
公开(公告)日:2023-10-10
申请号:US17830707
申请日:2022-06-02
Inventor: Chia-Yu Wei , Fu-Cheng Chang , Hsin-Chi Chen , Ching-Hung Kao , Chia-Pin Cheng , Kuo-Cheng Lee , Hsun-Ying Huang , Yen-Liang Lin
IPC: H01L29/06 , H01L27/146 , H01L29/423 , H01L29/78
CPC classification number: H01L27/14614 , H01L27/14643 , H01L29/0653 , H01L29/4236 , H01L29/42376 , H01L29/78 , H01L29/7853
Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures in a first direction. The semiconductor device further includes a gate structure. The gate structure includes a top surface; a first sidewall angled at a non-perpendicular angle with respect to the top surface; and a second sidewall angled with respect to the top surface. The gate structure further includes a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and a dimension of the gate structure in a second direction, perpendicular to the first direction, is less than a dimension of each of the plurality of isolation structures in the second direction.
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公开(公告)号:US11735618B2
公开(公告)日:2023-08-22
申请号:US17401382
申请日:2021-08-13
Inventor: Yun-Wei Cheng , Horng-Huei Tseng , Chao-Hsiung Wang , Chun-Hao Chou , Tsung-Han Tsai , Kuo-Cheng Lee , Tzu-Hsuan Hsu , Yung-Lung Hsu
IPC: H01L27/146
CPC classification number: H01L27/1464 , H01L27/14621 , H01L27/14623 , H01L27/14629 , H01L27/14685 , H01L27/14627
Abstract: A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.
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