Conduction layer for stacked CIS charging prevention
    4.
    发明授权
    Conduction layer for stacked CIS charging prevention 有权
    用于层叠CIS充电预防的传导层

    公开(公告)号:US09559135B2

    公开(公告)日:2017-01-31

    申请号:US14464035

    申请日:2014-08-20

    摘要: A semiconductor device includes a first semiconductor chip comprising a first metallic structure and a second semiconductor chip comprising a second metallic structure. The second semiconductor chip is bonded with the first semiconductor chip by a first conductive plug. A second conductive plug extends from the first metallic structure and into a substrate of the first semiconductor chip. The first conductive plug connects the first metallic structure and the second metallic structure, wherein a conductive liner is along a sidewall of the first conductive plug or the second conductive plug.

    摘要翻译: 半导体器件包括包括第一金属结构的第一半导体芯片和包括第二金属结构的第二半导体芯片。 第二半导体芯片通过第一导电插塞与第一半导体芯片接合。 第二导电插塞从第一金属结构延伸到第一半导体芯片的衬底中。 第一导电插头连接第一金属结构和第二金属结构,其中导电衬垫沿着第一导电插塞或第二导电插塞的侧壁。

    CMOS IMAGE SENSOR
    7.
    发明公开
    CMOS IMAGE SENSOR 审中-公开

    公开(公告)号:US20240105750A1

    公开(公告)日:2024-03-28

    申请号:US18110843

    申请日:2023-02-16

    IPC分类号: H01L27/146

    摘要: A CMOS image sensor includes PDAF pixels distributed in an array of image pixels in plan view. Each PDAF pixel includes m×m binned photodiodes, a PDAF color filter overlying the binned photodiodes and laterally surrounded by a first isolation structure, and a PDAF micro-lens overlying the PDAF color filter. A first horizontal distance between a center of the PDAF color filter and a center of the binned photodiodes varies depending on a location of the PDAF pixel in plan view in the CMOS image sensor. Additionally, the first isolation structure includes a first low-n dielectric grid, a second low-n dielectric grid underlying the first low-n dielectric grid, and a metal grid enclosed by the second low-n dielectric grid. The second low-n dielectric grid includes a filler dielectric material different from a second low-n dielectric grid material. Thus, quantum efficiency and uniformity of the CMOS image sensor are improved.

    Image sensor having stress releasing structure and method of forming same

    公开(公告)号:US11569289B2

    公开(公告)日:2023-01-31

    申请号:US17410666

    申请日:2021-08-24

    IPC分类号: H01L27/146 H01L23/00

    摘要: A semiconductor structure includes a substrate having a pixel array region and a first seal ring region, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The semiconductor structure further includes a first isolation feature in the first seal ring region, wherein the first isolation feature is filled with a dielectric material, and the first isolation feature is a continuous structure surrounding the pixel array region. The semiconductor structure further includes a second isolation feature between the first isolation feature and the pixel array region, wherein the second isolation feature is filled with the dielectric material.