Piezoelectronic device with novel force amplification

    公开(公告)号:US10964881B2

    公开(公告)日:2021-03-30

    申请号:US15825171

    申请日:2017-11-29

    IPC分类号: H01L41/09

    摘要: A piezoelectronic device with novel force amplification includes a first electrode; a piezoelectric layer disposed on the first electrode; a second electrode disposed on the piezoelectric layer; an insulator disposed on the second electrode; a piezoresistive layer disposed on the insulator; a third electrode disposed on the insulator; a fourth electrode disposed on the insulator; a semi-rigid housing surrounding the layers and the electrodes; wherein the semi-rigid housing is in contact with the first, third, and fourth electrodes and the piezoresistive layer; wherein the semi-rigid housing includes a void. The third and fourth electrodes are on the same plane and separated from each other in the transverse direction by a distance.

    Ion sensitive field effect transistor (FET) with back-gate coupled reference electrode

    公开(公告)号:US10928356B2

    公开(公告)日:2021-02-23

    申请号:US15299762

    申请日:2016-10-21

    摘要: A substrate's embedded substrate contact electrode forms a reference voltage point. A gate insulator is spaced outwardly from the substrate and has an exposed outer surface configured for contact with a fluid analyte. A device region is intermediate the substrate and the gate insulator; source and drain regions are adjacent the device region; and a field insulator is spaced outwardly of the drain region, the source region, and the substrate away from the device region. The gate insulator and the field oxide are formed of different materials having different chemical sensitivities to the fluid analyte. The field insulator is coupled to the substrate through the field insulator capacitance. The gate insulator capacitance is much smaller than the field insulator capacitance. The embedded substrate contact electrode can be connected to a separate voltage so that the electrical potential between the substrate and the source region can be controlled.

    FIELD EFFECT TRANSISTOR WITH CONTROLLABLE RESISTANCE

    公开(公告)号:US20190312108A1

    公开(公告)日:2019-10-10

    申请号:US16434711

    申请日:2019-06-07

    摘要: A method and resulting structures for a semiconductor device includes forming a source terminal of a semiconductor fin on a substrate. An energy barrier is formed on a surface of the source terminal. A channel is formed on a surface of the energy barrier, and a drain terminal is formed on a surface of the channel. The drain terminal and the channel are recessed on either sides of the channel, and the energy barrier is etched in recesses formed by the recessing. The source terminal is recessed using timed etching to remove a portion of the source terminal in the recesses formed by etching the energy barrier. A first bottom spacer is formed on a surface of the source terminal and a sidewall of the semiconductor fin, and a gate stack is formed on the surface of the first bottom spacer.