Abstract:
A reformer for a fuel cell system includes a reforming portion for converting fuel containing hydrogen into hydrogen-rich gas; and an adiabatic portion entirely covering the reforming portion, the adiabatic portion being composed of first and second adiabatic layers arranged opposing each other with at least one spacer interposed between the first and second adiabatic layers. As such, the fuel cell system has an effect of enhancing the adiabatic performance of a thermal reaction for producing reforming gas and distributing thermal residence stress uniformly on the surface of the reformer.
Abstract:
A fuel cell system that includes at least one electricity generator that generates electric energy through electrochemical reaction between hydrogen and oxygen, a reformer that generates hydrogen gas by reforming fuel containing hydrogen and supplies the hydrogen gas to the electricity generator, a fuel supply unit which supplies the fuel to the reformer, and an oxygen supply unit which supplies oxygen to the electricity generator and the reformer. The reformer includes a double pipe lines that are arranged concentrically and have independent flow paths through which fuel passes, and catalytic layers that are formed in the flow paths, generate thermal energy through chemical catalytic reaction, and generate hydrogen gas from the fuel.
Abstract:
A fuel cell system includes at least one electricity generator which generates electric energy through electrochemical reaction between hydrogen and oxygen, a fuel supply unit which supplies fuel containing hydrogen to the electricity generator, and an oxygen source which supplies oxygen to the at least one electricity generator. The fuel supply unit comprises an outer tank defining an inner space, and an inner fuel storage tank with deformable walls which is provided in the inner space of the outer tank to store fuel. Fuel is discharged from the inner fuel storage tank by the deformation of the inner fuel storage tank by applying a compressive force to the inner space of the outer tank through the use of a biasing mechanism.
Abstract:
In an apparatus and method for forming a silicide wire in a semiconductor device, a first gate film is provided with a first silicide layer in a first region (for example a wiring region of the device that is relatively thicker than a second silicide layer on a second gate film in a second region of the device. In this manner, the operating speed of the semiconductor device is improved.
Abstract:
The present invention provides a fuse of a semiconductor device and a method of forming a fuse of a semiconductor device. The method of the invention includes forming an underlying metal conductor on a semiconductor substrate, forming an insulating film over the underlying metal conductor, and selectively etching regions of the insulating film. One of the regions of the insulating film is etched to form a via contact region exposing the underlying metal conductor. A second region is etched to form a groove in the insulating film for the fuse metal. Metal is buried within the second etched region of the insulating film and the via contact region to respectively form a fuse metal pattern and a via contact metal layer. The fuse metal pattern can be formed from copper and/or tungsten.
Abstract:
A dual-port SRAM device includes a substrate having a field region and first to fourth active fins extending in a first direction, and a unit cell having first to eighth gate structures. The first and second gate structures are on the first, second and fourth active fins, and extend in a second direction crossing the first direction. The third and fourth gate structures are on the first, second and third active fins, and extend in the second direction. The fifth and sixth gate structures are on the third active fin, and extend in the second direction. The seventh and eighth gate structures are on the fourth active fin, and extend in the second direction. The sixth gate structure is electrically connected to the third gate structure through the first contact plug, and the seventh gate structure is electrically connected to the second gate structure through a second contact plug.
Abstract:
Semiconductor devices are provided. The semiconductor devices include a first fin; a first gate electrode intersecting the first fin; a first elevated source and/or drain on respective sides of the first gate electrode on the first fin; and a first field dielectric film adjacent the first fin. The first field dielectric film includes a first part below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain.
Abstract:
A method of fabricating a solar cell includes forming a doped portion having a first conductive type on a semiconductor substrate, growing an oxide layer on the semiconductor substrate, forming a plurality of recess portions in the oxide layer, further growing the oxide layer on the semiconductor substrate, forming a doped portion having a second conductive type on areas of the semiconductor substrate corresponding to the recess portions, forming a first conductive electrode electrically coupled to the doped portion having the first conductive type, and forming a second conductive electrode on the semiconductor substrate and electrically coupled to the doped portion having the second conductive type, wherein a gap between the doped portions having the first and second conductive types corresponds to a width of the oxide layer formed by further growing the oxide layer.
Abstract:
Provided are a spot size converter and a method of manufacturing the spot size converter. The method includes stacking a lower clad layer, a core layer, and a first upper clad layer on a substrate, tapering the first upper clad layer and the core layer in a first direction on a side of the substrate, forming a waveguide layer on the first upper clad layer and the lower clad layer, and etching the waveguide layer, the first upper clad layer, the core layer, and the lower clad layer such that the waveguide layer is wider than a tapered portion of the core layer on the side of the substrate and has the same width as that of the core layer on another side of the substrate.
Abstract:
A system for managing resources in a communication system including systems, which do not have a permission for a first frequency band, includes coexistence managers configured to, when a frequency band available for the systems is searched from the first frequency band, manage the systems for coexistence and frequency sharing of the systems in the available frequency band; a coexistence enabler configured to transmit and receive information of the systems and information of the coexistence managers; and a coexistence discovery and information server configured to support control of the coexistence managers over the systems, wherein the coexistence managers transmit and receive predetermined messages to and from the coexistence discovery and information server and the coexistence enabler, perform channel classification for the first frequency band, and determine operating channels of the systems on the basis of the channel classification.