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公开(公告)号:US20240086103A1
公开(公告)日:2024-03-14
申请号:US17943142
申请日:2022-09-12
申请人: VMware, Inc.
IPC分类号: G06F3/06
CPC分类号: G06F3/0656 , G06F3/0613 , G06F3/0673
摘要: Example methods and systems to process input/output (I/O) requests in a distributed storage system in a virtualized computing environment are disclosed. One example method includes executing a first thread to destage one or more data writes, wherein the one or more data writes correspond to a first bucket; executing a second thread to destage the one or more data deletes, wherein the one or more data deletes correspond to a second bucket; in response to executing the first thread, buffering write I/Os associated with the one or more data writes in a logical queue; in response to executing the second thread, buffering delete I/Os associated with the one or more data deletes in the logical queue; and adjusting a number of slots in the logical queue dedicated to buffer the delete I/Os based on a relationship between the first bucket and the second bucket.
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公开(公告)号:US11928352B2
公开(公告)日:2024-03-12
申请号:US17510795
申请日:2021-10-26
申请人: NetApp, Inc.
发明人: Krishna Murthy Chandraiah Setty Narasingarayanapeta , Preetham Shenoy , Divya Kathiresan , Rakesh Bhargava
IPC分类号: G06F3/06
CPC分类号: G06F3/065 , G06F3/0613 , G06F3/0619 , G06F3/0631 , G06F3/0653 , G06F3/0659 , G06F3/067
摘要: Systems and methods are described for performing persistent inflight tracking of operations (Ops) within a cross-site storage solution. According to one embodiment, a method comprises maintaining state information regarding a data synchronous replication status for a first storage object of a primary storage cluster and a second storage object of a secondary storage cluster. The state information facilitates automatic triggering of resynchronization for data replication between the first storage object and the second storage object. The method includes performing persistent inflight tracking of I/O operations with a first Op log of the primary storage cluster and a second Op log of the secondary storage cluster, establishing and comparing Op ranges for the first and second Op logs, and determining a relation between the Op range of the first Op log and the Op range of the second Op log to prevent divergence of Ops in the first and second Op logs and to support parallel split of the Ops.
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公开(公告)号:US20240071519A1
公开(公告)日:2024-02-29
申请号:US17898386
申请日:2022-08-29
CPC分类号: G06F3/0613 , G06F3/0635 , G06F3/0679 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/32
摘要: The disclosure provides circuits and methods for increasing NAND input/output (I/O) bandwidth during read/write operations. The method includes transmitting a clock signal between a controller I/O circuit and a memory I/O circuit along a read enable bus, transmitting 8 bits of data along an I/O bus, and transmitting 2 bits of data along a data strobe signal (DQS) bus. Transmitting 2 bits of data along the DQS bus includes transmitting a first DQS data signal along the DQS bus and transmitting a first inverse DQS data signal along the DQS bus.
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公开(公告)号:US20240061585A1
公开(公告)日:2024-02-22
申请号:US17821894
申请日:2022-08-24
发明人: Guang SHEN , Yue WEI
IPC分类号: G06F3/06
CPC分类号: G06F3/0613 , G06F3/0635 , G06F3/0679
摘要: Implementations described herein relate to memory command assignment based on command processor workload. In some implementations, a memory device may determine a first command type of a first memory command. The memory device may identify a first command processor, associated with the first command type, that is one of multiple command processors configured to execute memory commands. The first command processor may be configured to execute only commands having the first command type unless a computational credit condition, associated with another command processor, is satisfied. The memory device may determine that a cumulative computational credit value associated with the first command processor does not satisfy a condition. The memory device may assign the first memory command to the first command processor for execution based on determining that the cumulative computational credit value associated with the first command processor does not satisfy the condition.
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公开(公告)号:US11907539B2
公开(公告)日:2024-02-20
申请号:US17120068
申请日:2020-12-11
发明人: Jingpei Yang , Jing Yang , Rekha Pitchumani , YangSeok Ki
IPC分类号: G06F3/06
CPC分类号: G06F3/0613 , G06F3/0655 , G06F3/0679
摘要: A multi-stream solid-state device (SSD) includes a normal-access memory associated with a first stream ID, a high-access memory having a higher endurance than the normal-access memory and being associated with a second stream ID, a controller processor, and a processor memory coupled to the controller processor, wherein the processor memory has stored thereon instructions that, when executed by the controller processor, cause the controller processor to perform identifying a data stream ID of an input data stream as one of the first and second stream IDs, in response to identifying the data stream ID as the first stream ID, storing the input data stream in the normal-access memory, and in response to identifying the data stream ID as the second stream ID, storing the input data stream in the high-access memory.
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公开(公告)号:US20240053899A1
公开(公告)日:2024-02-15
申请号:US18311124
申请日:2023-05-02
发明人: Xiaoyu SUN , Murat Kerem AKARVARDAR
IPC分类号: G06F3/06 , G06N3/0464
CPC分类号: G06F3/0613 , G06F3/0656 , G06F3/0683 , G06N3/0464
摘要: A circuit includes a data buffer configured to sequentially output first and second pluralities of bits, a plurality of memory macros having a total number, and a distribution network coupled between the data buffer and the plurality of memory macros. The distribution network separates the first plurality of bits into the total number of first subsets, and outputs each first subset to a corresponding memory macro, and either outputs an entirety of the second plurality of bits to each memory macro, or separates the second plurality of bits into a number of second subsets less than or equal to the total number, and outputs each second subset to one or more corresponding memory macros. Each memory macro outputs a product of the corresponding first subset and the one of the entirety of the second plurality of bits or the corresponding second subset of the second plurality of bits.
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公开(公告)号:US11899952B2
公开(公告)日:2024-02-13
申请号:US17515021
申请日:2021-10-29
IPC分类号: G06F3/06
CPC分类号: G06F3/0634 , G06F3/0613 , G06F3/0617 , G06F3/0653 , G06F3/0659 , G06F3/0679
摘要: A system can log data access activity to a memory array with a metadata module while the memory array is logically divided into multiple namespaces. A workload can be determined for each namespace by the metadata module and a metadata strategy can be created with the metadata module in view of the respective namespace workloads. A first metadata and second metadata may be generated for respective first and second user-generated data for storage into a first namespace of the multiple namespaces. The first metadata can be compressed with a compression level prescribed by the metadata strategy in response to a detected or predicted workload to the first namespace before the first metadata, second metadata, first user-generated data, and second user-generated data are each stored in the first namespace.
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公开(公告)号:US11888967B2
公开(公告)日:2024-01-30
申请号:US17871429
申请日:2022-07-22
申请人: Intel Corporation
发明人: Francesc Guim Bernat
IPC分类号: H04L41/0896 , H04L41/5025 , H04L9/08 , G06F3/06 , G06F9/50 , H04L69/12 , H04L69/32 , G06F16/25 , G06F16/2453 , H04L49/9005 , G11C8/12 , G11C29/02 , G06F30/34 , B25J15/00 , G06F1/18 , G06F1/20 , G06F11/34 , G06F15/78 , H04L67/1008 , H05K7/14 , H05K7/18 , H05K7/20 , H04L67/1001 , G11C29/36 , G11C29/38 , G11C29/44 , G06F16/22 , G06F16/2455 , G06F12/02 , G06F12/14 , G06F13/16 , G06F15/173 , G06F13/40 , G06F13/42 , G06F9/448 , G06F9/28 , G06F15/16 , H04L41/0893 , H04L69/22 , H04L69/321 , H04L41/0213 , H04L41/0668 , H04L41/0677 , H04L45/28 , H04L45/7453 , H04L47/11 , H04L47/125 , H04L49/00 , H04L49/351 , G06F9/4401 , G06F9/445 , G06F12/06 , G06F16/23 , G06F16/248 , G06F16/901 , G06F16/11 , G06F9/44 , G06F9/48 , G06F21/10 , G06N3/063 , G06Q10/0631 , G06Q30/0283 , H04L41/14 , H04L41/5019 , H04L49/40 , H04L9/40 , G06F12/0802 , G06F12/1045
CPC分类号: H04L9/0819 , B25J15/0014 , G06F1/183 , G06F1/20 , G06F3/0604 , G06F3/065 , G06F3/0605 , G06F3/067 , G06F3/0611 , G06F3/0613 , G06F3/0629 , G06F3/0631 , G06F3/0632 , G06F3/0644 , G06F3/0647 , G06F3/0659 , G06F3/0673 , G06F3/0683 , G06F3/0685 , G06F9/28 , G06F9/445 , G06F9/4406 , G06F9/4411 , G06F9/4494 , G06F9/505 , G06F9/5044 , G06F9/5088 , G06F11/3442 , G06F12/023 , G06F12/06 , G06F12/0607 , G06F12/14 , G06F13/1663 , G06F13/1668 , G06F13/4068 , G06F13/42 , G06F15/161 , G06F15/17331 , G06F15/7807 , G06F15/7867 , G06F16/119 , G06F16/221 , G06F16/2237 , G06F16/2255 , G06F16/2282 , G06F16/2365 , G06F16/248 , G06F16/2453 , G06F16/2455 , G06F16/24553 , G06F16/25 , G06F16/9014 , G06F30/34 , G11C8/12 , G11C29/028 , G11C29/36 , G11C29/38 , G11C29/44 , H04L9/0894 , H04L41/0213 , H04L41/0668 , H04L41/0677 , H04L41/0893 , H04L41/0896 , H04L41/5025 , H04L45/28 , H04L45/7453 , H04L47/11 , H04L47/125 , H04L49/30 , H04L49/351 , H04L49/9005 , H04L67/1001 , H04L67/1008 , H04L69/12 , H04L69/22 , H04L69/32 , H04L69/321 , H05K7/1489 , H05K7/18 , H05K7/20209 , H05K7/20736 , G06F9/44 , G06F9/4401 , G06F9/4856 , G06F9/5061 , G06F12/0802 , G06F12/1054 , G06F12/1063 , G06F13/4022 , G06F15/1735 , G06F21/105 , G06F2200/201 , G06F2201/85 , G06F2209/509 , G06F2212/1044 , G06F2212/1052 , G06F2212/601 , G06F2213/0026 , G06F2213/0064 , G06F2213/3808 , G06N3/063 , G06Q10/0631 , G06Q30/0283 , H04L41/14 , H04L41/5019 , H04L49/40 , H04L63/0428 , H05K7/1498
摘要: Technologies for dynamic accelerator selection include a compute sled. The compute sled includes a network interface controller to communicate with a remote accelerator of an accelerator sled over a network, where the network interface controller includes a local accelerator and a compute engine. The compute engine is to obtain network telemetry data indicative of a level of bandwidth saturation of the network. The compute engine is also to determine whether to accelerate a function managed by the compute sled. The compute engine is further to determine, in response to a determination to accelerate the function, whether to offload the function to the remote accelerator of the accelerator sled based on the telemetry data. Also the compute engine is to assign, in response a determination not to offload the function to the remote accelerator, the function to the local accelerator of the network interface controller.
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公开(公告)号:US20240031295A1
公开(公告)日:2024-01-25
申请号:US17870578
申请日:2022-07-21
IPC分类号: H04L47/193 , G06F3/06 , H04L47/263
CPC分类号: H04L47/193 , G06F3/0613 , G06F3/0659 , G06F3/067 , H04L47/263
摘要: A method of congestion mitigation may include determining whether a host is sending a read command or a write command to an NVMe controller, and in response to a determination that the host is sending the read command, transmitting the read command via a first transmission control protocol (TCP) connection between the host and the NVMe controller. The method may further include in response to a determination that the host is sending the write command, transmitting the write command via a second TCP connection between the host and the NVMe controller.
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公开(公告)号:US20240020014A1
公开(公告)日:2024-01-18
申请号:US18477160
申请日:2023-09-28
发明人: Wen Zhou , Zhen Cheng , Yi Su , Hongfeng Jiang
IPC分类号: G06F3/06
CPC分类号: G06F3/0613 , G06F3/0659 , G06F3/0679
摘要: In a method for writing data to a solid-state drive, both a byte-level write interface and a page-level write interface are provided. Full-page input/output (I/O) data is written to a flash chip through the page-level interface, and small I/O data is written to a storage class memory (SCM) chip through the byte-level interface.
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