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    Creating arbitrary patterns on a 2-D uniform grid VCSEL array
    61.
    发明授权
    Creating arbitrary patterns on a 2-D uniform grid VCSEL array 有权

    公开(公告)号：US10411437B2

    公开(公告)日：2019-09-10

    申请号：US16180041

    申请日：2018-11-05

    Applicant: APPLE INC.

    Inventor： Chin Han Lin ,  Weiping Li ,  Xiaofeng Fan

    IPC: H01S5/183 ,  H01L29/15 ,  H01S5/026 ,  H01S5/187 ,  H01S5/42 ,  H01S5/042 ,  H01S5/20

    Abstract: An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.

    Top-emission VCSEL-array with integrated diffuser
    62.
    发明申请
    Top-emission VCSEL-array with integrated diffuser 审中-公开

    公开(公告)号：US20190017678A1

    公开(公告)日：2019-01-17

    申请号：US16055104

    申请日：2018-08-05

    Applicant: APPLE INC.

    Inventor： Neil MacKinnon ,  Weiping Li ,  Xiaofeng Fan

    IPC: F21V3/04 ,  H01S5/183 ,  H01S5/00

    Abstract: A radiation source includes a semiconductor substrate, an array of vertical-cavity surface-emitting lasers (VCSELs) formed on the substrate, which are configured to emit optical radiation, and a transparent crystalline layer formed over the array of VCSELs. The transparent crystalline layer has an outer surface configured to diffuse the radiation emitted by the VCSELs.

    Modular electrostatic discharge (ESD) protection
    65.
    发明授权
    Modular electrostatic discharge (ESD) protection 有权

    公开(公告)号：US09929139B2

    公开(公告)日：2018-03-27

    申请号：US14641486

    申请日：2015-03-09

    Applicant: Apple Inc.

    Inventor： Xiaofeng Fan ,  Xin Yi Zhang

    IPC: H01L27/02 ,  H01L23/60 ,  H01L23/552

    CPC classification number: H01L27/0255 ,  H01L23/552 ,  H01L23/60 ,  H01L27/0288 ,  H01L27/0292

    Abstract: In an embodiment, an integrated circuit (IC) may include a circuit block that couples to one or more pins of the IC to communicate and/or receive power on the pins. The circuit block may include a ground connection, which may be electrically insulated/electrically separate from the ground connection of other components of the integrated circuit. In an embodiment, the circuit block may include an ESD protection circuit for the pad coupled to the pin. The IC may include another ESD protection circuit for the pad. The circuit block's ESD protection circuit may be sized for the current that may produced within the circuit block for an ESD event, and the IC's ESD protection circuit may be sized for the current that may be produced from the other components of the IC.

    Image sensor with buried light shield and vertical gate
    66.
    发明授权
    Image sensor with buried light shield and vertical gate 有权

    公开(公告)号：US09842875B2

    公开(公告)日：2017-12-12

    申请号：US15161179

    申请日：2016-05-20

    Applicant: Apple Inc.

    Inventor： Xiaofeng Fan ,  Philip H. Li ,  Chung Chun Wan ,  Anup K. Sharma ,  Xiangli Li

    IPC: H01L27/146

    CPC classification number: H01L27/14623 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14685

    Abstract: A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region.

    Optimized ESD clamp circuitry
    69.
    发明授权
    Optimized ESD clamp circuitry 有权

    公开(公告)号：US09679891B2

    公开(公告)日：2017-06-13

    申请号：US14220293

    申请日：2014-03-20

    Applicant: Apple Inc.

    Inventor： Sanjay Dabral ,  Xiaofeng Fan ,  Geertjan Joordens

    IPC: H01L27/02 ,  H02H3/20 ,  H02H3/22 ,  H02H9/04

    CPC classification number: H01L27/0285 ,  H02H3/20 ,  H02H3/22 ,  H02H9/046

    Abstract: ESD protection circuitry is disclosed. In one embodiment, an integrated circuit includes first and second sensor circuits. The first sensor circuit has a first resistive-capacitive (RC) time constant, while the second sensor circuit has a second RC time constant. The RC time constant of the first sensor circuit is at least one order of magnitude greater than that of the second sensor circuit. A first clamp transistor is coupled to and configured to be activated by the first sensor circuit responsive to the latter detecting an ESD event. A second clamp transistor is coupled to and configured to be activated by the second sensor circuit responsive to the latter detecting the ESD event.

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