公开(公告)号：US3877050A

公开(公告)日：1975-04-08

申请号：US39211073

申请日：1973-08-27

Applicant: SIGNETICS CORP

Inventor： ALLEN RICHARD JOHN ,  SHIELDS MICHAEL ANTHONY

IPC: H01L27/07 ,  H01L29/00 ,  H01L5/02 ,  H01L19/00

CPC classification number: H01L27/0766 ,  H01L29/00

Abstract: Integrated circuit having a guard ring Schottky barrier diode therein in which first and second layers of metallization are provided overlying the Schottky barrier diode which are brought into intimate contact with the interconnect surface to establish intimate contact between the surface of the semiconductor body and the metallization.

公开(公告)号：US3812521A

公开(公告)日：1974-05-21

申请号：US33323973

申请日：1973-02-16

Applicant: MOTOROLA INC

Inventor： DAVIS W ,  PACE W

IPC: H01L21/00 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/761 ,  H01L23/485 ,  H01L23/52 ,  H01L5/02

CPC classification number: H01L24/05 ,  H01L21/00 ,  H01L21/761 ,  H01L23/485 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/4847 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05556 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A bonding pad substructure in a semiconductor device prevents injection of minority carriers into the substrate during negative overvoltages applied to the bonding pad. An N-type isolated region is provided in a P-type substrate. A P-type region is provided within the N-type region, subtending the metal bonding pad which is on an oxide layer on the substrate. Shorts between the bonding pad and the semiconductor which may occur at defects in the oxide layer are thus limited to the P-type region, and negative overvoltages on the bonding pad reverse bias the PN junction so that deleterious injection of electrons from the Ntype region into the substrate cannot occur.

公开(公告)号：US3808470A

公开(公告)日：1974-04-30

申请号：US29975472

申请日：1972-10-24

Applicant: SIEMENS AG

Inventor： KNIEPKAMP H

IPC: H01L21/60 ,  H01L21/288 ,  H01L23/482 ,  H01L29/47 ,  H01L29/872 ,  H01L5/02

CPC classification number: H01L21/288 ,  H01L23/4822 ,  H01L24/01 ,  H01L2924/12032 ,  H01L2924/00

Abstract: A beam-lead semiconductor component is, for example, a beam-lead Schottky diode, which includes a Schottky metal-semiconductor contact structure with one additional non-blocking contact structure. The semiconductor structure is formed with regions of different doping levels but of the same conductivity type having an insulating layer thereover which contains openings at at least two points, the two openings being over the regions of the different doping levels respectively and the region of lesser doping being formed in the upper surface of said other region. The regions exposed below said opening are provided with metal layers respectively. Contacts extend down into the openings into electrical contact with said metal layers respectively. These contacts come from correction with beam lead terminals which are provided on the surface of the insulating layer. The beam lead connections extend out from the component so that the semiconductor arrangement can be soldered in a self-supporting fashion directly into circuits. This avoids the occurrence of housing capacitances which do occur, for example, in the case of encapsulated diodes. The contact extending into the opening to the region of higher doping level is spaced from the region of lower doping level, with insulating material being therebetween. An ohmic contact is formed on the underside of the region having the higher doping level.

Abstract translation: 束引线半导体元件例如是束引线肖特基二极管，其包括具有一个附加非阻塞接触结构的肖特基金属 - 半导体接触结构。 半导体结构形成有不同掺杂水平的区域，但是具有相同导电类型的区域，其间具有绝缘层，其中至少两个点处包含开口，两个开口分别在不同掺杂水平的区域和较少掺杂的区域 形成在所述另一区域的上表面中。 暴露在所述开口下方的区域分别设置有金属层。 触头向下延伸到开口中，分别与所述金属层电接触。 这些触点来自设置在绝缘层的表面上的光束引线端子的校正。 光束引线连接从部件延伸出来，使得半导体布置可以以自支撑的方式直接焊接到电路中。 这避免了发生例如在封装二极管的情况下发生的外壳电容。 延伸到较高掺杂级别的开口的触点与较低掺杂水平的区域间隔开，其间具有绝缘材料。 在具有较高掺杂水平的区域的下侧上形成欧姆接触。

公开(公告)号：US3803462A

公开(公告)日：1974-04-09

申请号：US80620369

申请日：1969-03-11

Applicant: MATSUSHITA ELECTRIC IND CO LTD

Inventor： FUJITA T

IPC: H01L29/00 ,  H04R21/02 ,  H04R23/00 ,  H01L5/02

CPC classification number: H04R23/006 ,  H01L29/00 ,  H04R21/02

Abstract: A pressure sensitive bidirectional switching semiconductor device comprising a semiconductor substrate consisting of a semiconductive material such as silicon and of an additive of a deep energy level impurity, a surface of the semiconductor substrate having at least two projections of a mesa type, and separate electrodes provided on the surfaces of the semiconductor substrate so that the resistance measured between the separate electrodes may be varied in response to a pressure applied to the projections through the electrodes on the projections by means of a flat plate.

公开(公告)号：US3801880A

公开(公告)日：1974-04-02

申请号：US3801880D

申请日：1972-09-11

Applicant: HITACHI LTD

Inventor： HARADA S ,  NONOGAKI S ,  OBA Y ,  KOHASHI T ,  SATO K ,  SAIKI A ,  OKABE T

IPC: H01L21/768 ,  H01L21/00 ,  H01L21/312 ,  H01L21/3205 ,  H01L23/29 ,  H01L23/522 ,  H01L5/02

CPC classification number: H01L21/00 ,  H01L21/312 ,  H01L21/32051 ,  H01L23/291 ,  H01L2924/0002 ,  Y10T428/24331 ,  Y10T428/24851 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A multilayer interconnected structure is composed of a first patterned layer formed on a semiconductor substrate, through an SiO2 film where necessary, lands, trapezoidal in cross section, which are formed on the first patterned layer to connect the latter to another patterned layer to be formed thereon, a thermosetting polymer layer applied on the first layer to a thickness up to the surface of the trapezoidal lands, and a second patterned layer spread over the resin layer and electrically connected to the trapezoidal lands. By this fabrication technique a multilayer interconnected structure is obtained which has a minimum of steps in its individual patterned layers and possesses desirable inter-layer insulation characteristics.

Abstract translation: 多层互连结构由形成在半导体衬底上的第一图案层，通过需要的SiO 2膜，在第一图案化层上形成的梯形，梯形截面形成，以将后者连接到待形成的另一图形层 在其上施加在第一层上至达梯形接合面的表面的厚度的热固性聚合物层，以及分散在树脂层上并电连接到梯形接合面的第二图案化层。 通过这种制造技术，获得了多层互连结构，其在其各个图案化层中具有最小的步骤并且具有期望的层间绝缘特性。

公开(公告)号：US3742315A

公开(公告)日：1973-06-26

申请号：US3742315D

申请日：1971-10-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  HASEGAWA H ,  IIZUKA M ,  FUJIWARA S ,  TERAMOTO I ,  IWASA H

IPC: H01L21/306 ,  H01L23/485 ,  H01L29/00 ,  H01L29/872 ,  H01L5/02 ,  H01L7/50 ,  H01L7/60

CPC classification number: H01L29/872 ,  H01L21/30608 ,  H01L23/4855 ,  H01L29/00 ,  H01L2924/0002 ,  Y10S148/051 ,  Y10S148/102 ,  Y10S148/115 ,  Y10S148/139 ,  H01L2924/00

Abstract: A semiconductor device having a Schottky barrier junction formed in the bottom of a polygonal recess on a surface of a semiconductor substrate comprises an undercut in the recess beneath an insulating mask formed on the substrate, and a metal passing through the mask and extending to the bottom of the recess for forming said junction. The undercut provides an enclosed spacing encircling the junction portion of said metal and said semiconductor, thereby improving the backward breakdown voltage characteristic therein.

公开(公告)号：US3736478A

公开(公告)日：1973-05-29

申请号：US3736478D

申请日：1971-09-01

Applicant: RCA CORP

Inventor： VELORIC H

IPC: H01L29/417 ,  H01L21/331 ,  H01L29/00 ,  H01L29/73 ,  H01L5/02 ,  H01L11/08

CPC classification number: H01L29/00 ,  H01L29/73 ,  Y10S148/085 ,  Y10S148/145

Abstract: An RF transistor has base and collector regions and a plurality of discrete emitter segments extending into the base region. A highly conductive intermetallic, such as PtSi grid extends into the base region and individually surrounds each emitter segment. The highly conductive intermetallic, such as PtSi grid is separated from the collector region by a highly resistive grid of the same conductivity type as the base region.

Abstract translation: RF晶体管具有基极和集电极区域以及延伸到基极区域中的多个离散发射极区域。 高度导电的金属间化合物，例如PtSi栅极延伸到基极区域中并且分别围绕每个发射极区段。 通过与基极区相同的导电类型的高电阻栅格将诸如PtSi栅极的高度导电的金属间化合物从集电极区域分离。

公开(公告)号：US3639811A

公开(公告)日：1972-02-01

申请号：US3639811D

申请日：1970-11-19

Applicant: FAIRCHILD CAMERA INSTR CO

Inventor： SCHROEDER JON M

IPC: H01L21/00 ,  H01L23/485 ,  H01L5/02

CPC classification number: H01L21/00 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method is disclosed for batch forming extended beam leads to the pads or contact areas of a solid state device (e.g., monolithic integrated circuit hybrid integrated circuit, discrete device) whereby external connections to the device may be made. The process involves depositing a metal or a plurality of metals over the device in a predetermined manner with the metal adhering to the device contact area but only weakly, if at all, adhering to the remainder of the surface. The device is separated by backside scribing which leaves the beams extending from the contact area of each device.

Abstract translation: 公开了一种用于批量形成延伸光束引线到固态器件（例如，单片集成电路混合集成电路，分立器件）的焊盘或接触区域的方法，由此可以进行到器件的外部连接。 该方法包括在金属附着于器件接触区域上的情况下以预定的方式在器件上沉积金属或多种金属，但只有弱的（如果有的话）粘附到表面的其余部分上。 该装置通过背面划线分离，其使得梁从每个装置的接触区域延伸。

公开(公告)号：US3629667A

公开(公告)日：1971-12-21

申请号：US3629667D

申请日：1969-03-14

Applicant: IBM

Inventor： LUBART NEIL D ,  VORA MADHUKAR B

IPC: H01L29/8605 ,  H01L5/02

CPC classification number: H01L29/8605

Abstract: A diffused resistor for semiconductor integrated circuits which avoids the problems caused by the high surface current density. The resistor includes at least one semiconductor region of conductivity type opposite to the resistor proper located between a pair of ohmic contacts to the resistor region. This semiconductor region diverts the current flow from the surface of the resistor region and causes a more uniform current distribution across the surface of the ohmic contacts.

公开(公告)号：US3619732A

公开(公告)日：1971-11-09

申请号：US3619732D

申请日：1969-05-16

Applicant: ENERGY CONVERSION DEVICES INC

Inventor： NEALE RONALD G

IPC: G11C11/41 ,  G11C11/39 ,  G11C13/00 ,  G11C16/02 ,  H01L45/00 ,  H03K17/00 ,  H01L3/00 ,  H01L5/02

CPC classification number: H01L45/06 ,  G11C11/39 ,  G11C13/0002 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/1273

Abstract: A coplanar semiconductor switch structure comprises a pair of electrodes deposited as a film on a suitable substrate with a gap formed between the ends of the electrodes, and an active semiconductor material deposited as a film in the gap between the ends of the electrodes. The ends of the deposited electrodes are so formed as to provide a minimum gap distance therebetween with increasing gap distance on each side thereof to provide a preferred location for the conducting path or paths through the active semiconductor material between the electrodes. The film thickness of the deposited acting semiconductor material is greater than the largest transverse dimension or diameter of the conducting path or paths so to be totally confined in the material. The active semiconductor material may be made to extend substantially equally from each side of the gap between the electrodes so that the current conducting path or paths may be symmetrical about an axis between the electrodes.