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公开(公告)号:US10002969B2
公开(公告)日:2018-06-19
申请号:US15407839
申请日:2017-01-17
发明人: I-Sheng Chen , Chih Chieh Yeh , Cheng-Hsien Wu
IPC分类号: H01L29/786 , H01L29/66 , H01L29/06 , H01L29/423 , H01L29/24 , H01L29/267 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/78
CPC分类号: H01L29/78618 , H01L21/30604 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L21/823842 , H01L21/82385 , H01L27/092 , H01L27/0924 , H01L29/0649 , H01L29/0673 , H01L29/0847 , H01L29/1054 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/267 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/66772 , H01L29/6681 , H01L29/7848 , H01L29/7853 , H01L29/78696
摘要: A semiconductor device includes channel layers disposed over a substrate, a source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the channel layers, and a gate electrode layer disposed on the gate dielectric layer and wrapping each of the channel layers. Each of the channel layers includes a semiconductor wire made of a first semiconductor material. The semiconductor wire extends into the source/drain region. The semiconductor wire in the source/drain regions is wrapped around by a second semiconductor material.