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    Method of forming organic semiconductor layer pattern
    51.
    发明授权
    Method of forming organic semiconductor layer pattern 有权
    形成有机半导体层图案的方法

    公开(公告)号：US08057848B2

    公开(公告)日：2011-11-15

    申请号：US11453930

    申请日：2006-06-16

    Applicant: Jong-Jin Park ,  Tae-Yong Noh ,  Myeong-Suk Kim ,  Sung-Hun Lee ,  Eun-Jeong Jeong ,  Dong-Woo Shin ,  Lyong-Sun Pu

    Inventor： Jong-Jin Park ,  Tae-Yong Noh ,  Myeong-Suk Kim ,  Sung-Hun Lee ,  Eun-Jeong Jeong ,  Dong-Woo Shin ,  Lyong-Sun Pu

    IPC: B05D5/06 ,  B05D3/06 ,  B41M3/12

    CPC classification number: H01L51/0013 ,  H01L27/3244 ,  H01L51/0055

    Abstract: A donor substrate and a method of forming an organic semiconductor layer pattern using the donor substrate, whereby a donor substrate is formed using an organic semiconductor precursor having a thermally decomposable substituent through a wet process, the organic semiconductor precursor substrate in the donor substrate is transferred to a receptor substrate as a pattern and heated, and thus is changed into an organic semiconductor. As a result, an organic semiconductor layer pattern is obtained. The method can be used in the manufacture of various devices such as organic light emitting diode and organic thin film transistor. A low-molecular weight organic semiconductor layer pattern can be formed through a wet process, not through deposition. Thus, using the method, a flat display device can be conveniently manufactured at low cost.

    Abstract translation: 供体基板和使用供体基板形成有机半导体层图案的方法，由此通过湿法使用具有可热分解取代基的有机半导体前体形成供体基板，转移供体基板中的有机半导体前体基板 作为图案的受体底物加热，从而变成有机半导体。 结果，得到有机半导体层图案。 该方法可用于制造有机发光二极管和有机薄膜晶体管等各种器件。 可以通过湿法而不是通过沉积形成低分子量有机半导体层图案。 因此，使用该方法，可以以低成本方便地制造平面显示装置。

    Organic Light Emitting Display Apparatus
    52.
    发明申请
    Organic Light Emitting Display Apparatus 有权
    有机发光显示装置

    公开(公告)号：US20110198629A1

    公开(公告)日：2011-08-18

    申请号：US13023094

    申请日：2011-02-08

    Applicant: Sung-Hun Lee ,  Gun-Shik Kim

    Inventor： Sung-Hun Lee ,  Gun-Shik Kim

    IPC: H01L51/52

    CPC classification number: H01L27/3213 ,  H01L27/322 ,  H01L27/3244 ,  H01L51/5265

    Abstract: An organic light emitting display apparatus has a hybrid structure in which resonance red, green and blue pixels and a non-resonance white pixel are combined. An optical path control layer and a white color filter which selectively absorbs light having a specific wavelength are included in the white pixel. Thus, the organic light emitting display apparatus has a large viewing angle, low power consumption, and long lifetime.

    Abstract translation: 有机发光显示装置具有共振红色，绿色和蓝色像素以及非共振白色像素组合的混合结构。 选择性吸收具有特定波长的光的光路控制层和白色滤色器被包括在白色像素中。 因此，有机发光显示装置的视角大，功耗低，寿命长。

    Method of patterning nano conductive film
    53.
    发明授权
    Method of patterning nano conductive film 有权
    纳米导电膜图案方法

    公开(公告)号：US07884356B2

    公开(公告)日：2011-02-08

    申请号：US11394085

    申请日：2006-03-31

    Applicant: Jong-Jin Park ,  Myeong-Suk Kim ,  Tae-Yong Noh ,  Sung-Hun Lee ,  Sang-Yoon Lee ,  Eun-Jeong Jeong

    Inventor： Jong-Jin Park ,  Myeong-Suk Kim ,  Tae-Yong Noh ,  Sung-Hun Lee ,  Sang-Yoon Lee ,  Eun-Jeong Jeong

    IPC: H01L35/24 ,  H01L51/00

    CPC classification number: H01L51/0013 ,  H01L51/0055 ,  Y10S977/788

    Abstract: A donor substrate for forming a nano conductive film includes a base substrate and a transferring layer that is disposed on the base substrate. The transferring layer includes nano conductive particles and an organic semiconductor. A method of patterning a nano conductive film is provided, wherein a donor substrate in which nano conductive particles are dispersed by employing an organic semiconductor having low molecular weight as a binder is prepared, and nano conductive particles are patterned on a receptor substrate by employing the donor substrate. The method can be used to prepare patterns of various devices including a display device such as an OLED and an OTFT. Such a device can be prepared simply and economically by preparing a device comprising nano conductive particles and an organic semiconductor in wet basis even without deposition.

    Abstract translation: 用于形成纳米导电膜的施主衬底包括基底和设置在基底上的转印层。 转移层包括纳米导电颗粒和有机半导体。 提供一种图案化纳米导电膜的方法，其中通过使用具有低分子量的有机半导体作为粘合剂分散纳米导电颗粒的施主衬底被制备，并且通过使用纳米导电颗粒 供体底物。 该方法可用于准备包括诸如OLED和OTFT的显示装置的各种装置的图案。 这样的器件可以简单且经济地制备，即使在不沉积的情况下通过制备包含纳米导电颗粒和有机半导体的器件也是湿的。

    Semiconductor memory device including double spacers on sidewall of flating gate, electronic device including the same
    55.
    发明授权
    Semiconductor memory device including double spacers on sidewall of flating gate, electronic device including the same 有权
    半导体存储器件包括在隔离栅侧壁上的双重间隔物，包括该隔离栅的电子器件

    公开(公告)号：US07671400B2

    公开(公告)日：2010-03-02

    申请号：US12133587

    申请日：2008-06-05

    Applicant: Joon-Sung Lim ,  Jong-Ho Park ,  Hyun-Chul Back ,  Sung-Hun Lee

    Inventor： Joon-Sung Lim ,  Jong-Ho Park ,  Hyun-Chul Back ,  Sung-Hun Lee

    IPC: H01L29/788

    CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L27/11524

    Abstract: A semiconductor memory device includes a device isolation layer formed in a semiconductor substrate to define a plurality of active regions. Floating gates are disposed on the active regions. A control gate line overlaps top surfaces of the floating gates and crosses over the active regions. The control gate line has an extending portion disposed in a gap between adjacent floating gates and overlapping sidewalls of the adjacent floating gates. First spacers are disposed on the sidewalls of the adjacent floating gates. Each of the first spacers extends along a sidewall of the active region and along a sidewall of the device isolation layer. Second spacers are disposed between outer sidewalls of the first spacers and the extending portion and are disposed above the device isolation layer. An electronic device including a semiconductor memory device and a method of fabricating a semiconductor memory device are also disclosed.

    Abstract translation: 半导体存储器件包括形成在半导体衬底中以限定多个有源区的器件隔离层。 浮动门设置在活动区域​​上。 控制栅极线与浮动栅极的顶表面重叠，并在有源区域上交叉。 控制栅极线具有设置在相邻浮动栅极之间的间隙中的延伸部分和相邻浮动栅极的重叠侧壁之间。 第一间隔件设置在相邻浮动门的侧壁上。 每个第一间隔件沿着有源区的侧壁并且沿着器件隔离层的侧壁延伸。 第二间隔件设置在第一间隔件的外侧壁和延伸部分之间，并且设置在装置隔离层的上方。 还公开了一种包括半导体存储器件和制造半导体存储器件的方法的电子器件。

    Flash memory and method of fabricating the same
    58.
    发明申请
    Flash memory and method of fabricating the same 有权
    闪存及其制造方法

    公开(公告)号：US20060154419A1

    公开(公告)日：2006-07-13

    申请号：US11327321

    申请日：2006-01-09

    Applicant: Dong-Seog Eun ,  Sung-Hun Lee

    Inventor： Dong-Seog Eun ,  Sung-Hun Lee

    IPC: H01L21/336 ,  H01L29/76

    CPC classification number: H01L27/11521 ,  H01L27/115

    Abstract: A method of fabricating a flash memory device produces a device that has a small cell area and yet a high coupling ratio. First, a basic structure is provided that includes a substrate, a field isolation film protruding from the substrate, and floating gates disposed on the substrate on opposite sides of the floating gate. A first etch process is performed to remove a portion of the field isolation film and thereby expose upper portions of the floating gates. Then, a second etch process is performed to knock off the edges of the floating gates. Thus, a large amount of space is secured between the floating gates for a dielectric film and a control gate.

    Abstract translation: 制造闪速存储器件的方法产生具有小单元面积并且具有高耦合比的器件。 首先，提供了一种基本结构，其包括基板，从基板突出的场隔离膜以及在浮动栅极的相对侧上设置在基板上的浮动栅极。 执行第一蚀刻工艺以去除场隔离膜的一部分，从而暴露浮栅的上部。 然后，执行第二蚀刻处理以敲除浮动栅极的边缘。 因此，在用于电介质膜的浮动栅极和控制栅极之间确保了大量的空间。

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