Integrated Ultraviolet Analyzer
    51.
    发明申请

    公开(公告)号:US20170284933A1

    公开(公告)日:2017-10-05

    申请号:US15472198

    申请日:2017-03-28

    CPC classification number: G01N21/33

    Abstract: An integrated ultraviolet analyzer is described. The integrated ultraviolet analyzer can include one or more ultraviolet analyzer cells, each of which includes one or more ultraviolet photodetectors and one or more solid state light sources, which are monolithically integrated. The solid state light source can be operated to emit ultraviolet light, at least some of which passes through an analyzer active gap and irradiates a light sensing surface of the ultraviolet photodetector. A medium to be evaluated can be present in the analyzer active gap and affect the ultraviolet light as it passes there through, thereby altering an effect of the ultraviolet light on a ultraviolet photodetector.

    Solid-State Lighting Structure With Light Modulation Control
    53.
    发明申请
    Solid-State Lighting Structure With Light Modulation Control 有权
    具有光调制控制的固态照明结构

    公开(公告)号:US20170079102A1

    公开(公告)日:2017-03-16

    申请号:US15263731

    申请日:2016-09-13

    Abstract: A solid-state light source (SSLS) with light modulation control is described. A SSLS device can include a main p-n junction region configured for recombination of electron-hole pairs for light emission. A supplementary p-n junction region is proximate the main p-n junction region to supplement the recombination of electron-hole pairs, wherein the supplementary p-n junction region has a smaller electron-hole life time than the electron-hole life time of the main p-n junction region. The main p-n junction region and the supplementary p-n junction region operate cooperatively in a light emission state and a light turn-off-state. In one embodiment, the recombination of electron-hole pairs occurs in the main p-n junction region during a light emission state, and the recombination of electron-hole pairs occurs in the supplementary p-n junction region light during the light turn off-state.

    Abstract translation: 描述了具有光调制控制的固态光源(SSLS)。 SSLS器件可以包括配置用于光发射的电子 - 空穴对复合的主p-n结区域。 辅助p-n结区域靠近主p-n结区域以补充电子 - 空穴对的复合,其中补充p-n结区域比主p-n结区域的电子 - 空穴寿命具有更小的电子 - 空穴寿命。 主p-n结区域和辅助p-n结区域在发光状态和光关闭状态下协同工作。 在一个实施例中,在发光状态期间,在主p-n结区域中发生电子 - 空穴对的复合,并且在光关闭状态期间,在辅助p-n结区域光中发生电子 - 空穴对的复合。

    Solid-State Lighting Structure With Integrated Short-Circuit Protection
    55.
    发明申请
    Solid-State Lighting Structure With Integrated Short-Circuit Protection 有权
    具有集成短路保护的固态照明结构

    公开(公告)号:US20170077085A1

    公开(公告)日:2017-03-16

    申请号:US15263716

    申请日:2016-09-13

    CPC classification number: H01L27/0266 H01L23/62 H01L25/167 H01L27/0248

    Abstract: A solid-state light source (SSLS) with an integrated short-circuit protection approach is described. A device can include a SSLS having an n-type semiconductor layer, a p-type semiconductor layer and a light generating structure formed there between. A field-effect transistor (FET) can be monolithically connected in series with the SSLS. The FET can have a saturation current that is greater than the normal operating current of the SSLS and less than a predetermined protection current threshold specified to protect the SSLS and the FET.

    Abstract translation: 描述了具有集成短路保护方法的固态光源(SSLS)。 器件可以包括具有n型半导体层的SSLS,p型半导体层和在其间形成的发光结构。 场效应晶体管(FET)可以与SSLS串联单片连接。 FET可以具有大于SSLS的正常工作电流的饱和电流,并且小于为保护SSLS和FET而规定的预定保护电流阈值。

    Semiconductor Device with Multiple Space-Charge Control Electrodes
    59.
    发明申请
    Semiconductor Device with Multiple Space-Charge Control Electrodes 审中-公开
    具有多个空间电荷控制电极的半导体器件

    公开(公告)号:US20150054570A1

    公开(公告)日:2015-02-26

    申请号:US14527203

    申请日:2014-10-29

    Abstract: A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located between a first terminal, such as a gate or a cathode, and a second terminal, such as a drain or an anode, of the device. The circuit includes a biasing network, which supplies an individual bias voltage to each of the set of space-charge control electrodes. The bias voltage for each space-charge control electrode can be: selected based on the bias voltages of each of the terminals and a location of the space-charge control electrode relative to the terminals and/or configured to deplete a region of the channel under the corresponding space-charge control electrode at an operating voltage applied to the second terminal.

    Abstract translation: 提供了包括具有一组空间电荷控制电极的半导体器件的电路。 该组空间电荷控制电极位于该器件的第一端子(例如栅极或阴极)和第二端子(例如漏极或阳极)之间。 电路包括偏置网络,其向每组空间电荷控制电极中的每一个提供单独的偏置电压。 每个空间电荷控制电极的偏置电压可以是:基于每个端子的偏置电压和空间电荷控制电极相对于端子的位置来选择和/或被配置为消耗通道下方的区域 对应的空间电荷控制电极施加到第二端子的工作电压。

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