公开(公告)号：US20230217012A1

公开(公告)日：2023-07-06

申请号：US18068809

申请日：2022-12-20

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/513 ,  H04N19/70 ,  H04N19/159

CPC classification number: H04N19/105 ,  H04N19/176 ,  H04N19/513 ,  H04N19/70 ,  H04N19/159

Abstract: A video decoder may be configured to generate a first ordering of reference pictures in a reference picture list for a first block of a slice, wherein generating the first ordering of the reference pictures for the first block comprises assigning indexes to the reference pictures; and generate a second ordering of the reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, wherein the first ordering is different than the second ordering and generating the second ordering of reference pictures for the second block comprises assigning at least some of the indexes to different reference pictures than in the first ordering; decode the first block using the first ordering of the reference pictures; and decode the second block using the second ordering of the reference pictures.

公开(公告)号：US20230199226A1

公开(公告)日：2023-06-22

申请号：US18168925

申请日：2023-02-14

Applicant: QUALCOMM Incorporated

Inventor： Alican Nalci ,  Marta Karczewicz ,  Muhammed Zeyd Coban

IPC: H04N19/70 ,  H04N19/124 ,  H04N19/174 ,  H04N19/176 ,  H04N19/46

CPC classification number: H04N19/70 ,  H04N19/124 ,  H04N19/174 ,  H04N19/176 ,  H04N19/46

Abstract: An example device includes memory and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to receive a first slice header syntax element for a slice of the video data and determine a first value for the first slice header syntax element, the first value being indicative of whether dependent quantization is enabled. The one or more processors are configured to receive a second slice header syntax element for the slice of the video data and determine a second value for the second slice header syntax element, the second value being indicative of whether sign data hiding is enabled. The one or more processors are configured to determine whether transform skip residual coding is disabled for the slice based on the first value and the second value and decode the slice based on the determinations.

公开(公告)号：US20230199211A1

公开(公告)日：2023-06-22

申请号：US18057500

申请日：2022-11-21

Applicant: QUALCOMM Incorporated

Inventor： Chun-Chi Chen ,  Han Huang ,  Zhi Zhang ,  Yao-Jen Chang ,  Yan Zhang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/503 ,  H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/109 ,  H04N19/172 ,  H04N19/176

CPC classification number: H04N19/503 ,  H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/109 ,  H04N19/172 ,  H04N19/176

Abstract: A video encoder and video decoder may determine to enable or disable a template-based inter prediction technique based on whether reference picture resampling or weighted prediction are used. A video encoder and video decoder may determine that a reference picture resampling mode is enabled. determine not to apply a template-based inter prediction technique to the video data based on the reference picture resampling mode being enabled, and code the video data using inter prediction without applying the template-based inter prediction technique.

公开(公告)号：US11683517B2

公开(公告)日：2023-06-20

申请号：US17101687

申请日：2020-11-23

Applicant: QUALCOMM Incorporated

Inventor： Zhi Zhang ,  Chun-Chi Chen ,  Han Huang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/56 ,  H04N19/70 ,  H04N19/176 ,  H04N19/513

CPC classification number: H04N19/513 ,  H04N19/176 ,  H04N19/56 ,  H04N19/70

Abstract: A method of decoding video data may comprise decoding data from an encoded bitstream to generate motion vectors and performing a decoder-side motion vector refinement (DMVR) process on one or more of the motion vectors. Performing the DMVR process may include determining one or more characteristics of current video block being decoded and determining a search area for the DMVR process for the current video block based on the determined one or more characteristics of the current video block.

公开(公告)号：US11683489B2

公开(公告)日：2023-06-20

申请号：US17132836

申请日：2020-12-23

Applicant: QUALCOMM Incorporated

Inventor： Yung-Hsuan Chao ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/119 ,  H04N19/176 ,  H04N19/157 ,  H04N19/70 ,  H04N19/186

CPC classification number: H04N19/119 ,  H04N19/157 ,  H04N19/176 ,  H04N19/186 ,  H04N19/70

Abstract: A method of decoding video data includes determining that a current block of the video data is coded in palette mode, determining, between single tree or dual tree partitioning, that the current block is coded with single tree partitioning enabled, determining that the current block is coded in monochrome format, when the current block is coded with single tree partitioning enabled and when the current block is coded in monochrome format, determining that a number of color components used for palette mode decoding the current block is equal to one, and palette mode decoding the current block based on the determined number of color components used for palette mode decoding the current block being equal to one.

公开(公告)号：US20230177739A1

公开(公告)日：2023-06-08

申请号：US18060208

申请日：2022-11-30

Applicant: QUALCOMM Incorporated

Inventor： Luong Pham Van ,  Geert Van der Auwera ,  Adarsh Krishnan Ramasubramonian ,  Marta Karczewicz

IPC: G06T9/40 ,  G06T7/246

CPC classification number: G06T9/40 ,  G06T7/246 ,  G06T2207/10028

Abstract: A method of decoding point cloud data comprises: determining that the point cloud data is split into a plurality of largest prediction units (LPUs), wherein at least two of the LPUs have different sizes along different directions; performing inter prediction to determine predicted points for the LPUs; and reconstructing points within the LPUs based on the predicted points for the LPUs.

公开(公告)号：US11659197B2

公开(公告)日：2023-05-23

申请号：US17222380

申请日：2021-04-05

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Jianle Chen ,  Wei-Jung Chien ,  Marta Karczewicz

IPC: H04N19/52 ,  H04N19/70 ,  H04N19/176 ,  H04N19/132 ,  H04N19/46

CPC classification number: H04N19/52 ,  H04N19/132 ,  H04N19/176 ,  H04N19/46 ,  H04N19/70

Abstract: An example method includes encoding, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; based on affine model based motion compensation being enabled, encoding, in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and encoding a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

公开(公告)号：US11638034B2

公开(公告)日：2023-04-25

申请号：US17507512

申请日：2021-10-21

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Geert Van der Auwera ,  Cheng-Teh Hsieh ,  Thibaud Laurent Biatek ,  Luong Pham Van ,  Marta Karczewicz

IPC: H04N19/593 ,  H04N19/176 ,  H04N19/44

Abstract: A video coder determines a plurality of available Matrix Intra Prediction (MIP) parameter sets (MPS's) for a picture of video data. The plurality of available MPS's is a union of (i) a subset of all default MPS's and (ii) a set of additional MPS's that are signaled in the bitstream. Each of the default MPS's is associated with a predefined MIP mode in a codec. Each of the set of additional MPS's is associated with a new MIP mode in a set of new MIP modes. The video decoder uses a MIP mode associated with an MPS in the plurality of available MPS's to generate a prediction block for a current block of the picture.

公开(公告)号：US11632563B2

公开(公告)日：2023-04-18

申请号：US16793751

申请日：2020-02-18

Applicant: QUALCOMM Incorporated

Inventor： Hongtao Wang ,  Wei-Jung Chien ,  Vadim Seregin ,  Yu Han ,  Marta Karczewicz

IPC: H04N19/513 ,  H04N19/52 ,  H04N19/54 ,  H04N19/105 ,  H04N19/139

Abstract: Techniques related to derivation of motion vectors of a first color component (e.g., chroma component) from motion vectors of a second color component (e.g., luma component) are described. A video coder (e.g., video encoder or video decoder), for a CU coded in affine mode with 4:4:4 color format, may determine a motion vector for each sub-block of the luma block, and determine a motion vector for each sub-block of the chroma block based only on the motion vector for each co-located (also called collocated) sub-block of the luma block. However, for another CU coded in affine mode but with a color format other than 4:4:4 (e.g., 4:2:2 or 4:2:0), the video coder may determine a motion vector for each sub-block of the chroma block based on an average of two or more motion vectors of sub-blocks of the luma block.

公开(公告)号：US11627327B2

公开(公告)日：2023-04-11

申请号：US16947463

申请日：2020-08-03

Applicant: QUALCOMM Incorporated

Inventor： Yung-Hsuan Chao ,  Chao-Hsiung Hung ,  Wei-Jung Chien ,  Marta Karczewicz

IPC: H04N19/186 ,  H04N19/593 ,  H04N19/70 ,  H04N19/176 ,  H04N19/13 ,  H04N19/91

Abstract: An example device for decoding video data includes a memory for storing the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine whether a first coding unit (CU) is a skip mode CU, and based on the first CU not being a skip mode CU, determine whether the first CU is encoded using one of an intra mode or a palette mode. The one or more processors are also configured to determine whether the first CU is encoded using the palette mode based on the first CU being encoded using one of the intra mode or the palette mode. The one or more processors are also configured to decode the first CU based on the determination of whether the first CU is encoded using the palette mode.