公开(公告)号：US06528365B2

公开(公告)日：2003-03-04

申请号：US09974510

申请日：2001-10-10

Applicant: Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

Inventor： Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

IPC: H01L218242

CPC classification number: H01L27/11502 ,  H01L21/76895 ,  H01L27/11507 ,  H01L28/40

Abstract: A semiconductor memory device, includes: a semiconductor substrate including a transistor; a first protective insulating film for covering the semiconductor substrate; at least one data storage capacitor element formed on the first protective insulating film; a second protective insulating film for covering the first protective insulating film and the capacitor element; a hydrogen barrier layer; and an interconnection layer for electrically connecting the transistor and the capacitor element, wherein: the capacitor element includes a lower electrode formed on the first protective insulating film, a capacitor film formed on the lower electrode, and an upper electrode formed on the capacitor film, the capacitor film includes an insulating metal oxide, the second protective insulating film has a first contact hole reaching the upper electrode and a second contact hole reaching the lower electrode, and the hydrogen barrier layer is provided in the first and second contact holes, so as not to expose the upper and the lower electrodes.

公开(公告)号：US06214660B1

公开(公告)日：2001-04-10

申请号：US09177620

申请日：1998-10-23

Applicant: Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

Inventor： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

IPC: H01L213205

CPC classification number: H01L27/11502 ,  H01L28/40 ,  H01L28/56

Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

Abstract translation: 一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜 钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

公开(公告)号：US6046490A

公开(公告)日：2000-04-04

申请号：US132023

申请日：1998-08-10

Applicant: Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

Inventor： Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC: H01L21/02 ,  H01L21/768 ,  H01L29/40

CPC classification number: H01L28/55 ,  H01L21/76895

Abstract: A semiconductor device is provided with a multilayered interconnection and a capacitor dielectric element, in which the transistor in the device has a non-degraded characteristics and the degradation of the capacitor dielectric element is suppressed. The semiconductor device has wiring layers connecting to one another through contact holes in insulating layers. One of the insulating layers is formed so as to cover at least a part of the area above the transistor and so as not to cover the area above the capacitor dielectric element. Hydrogen generated by heat-treating the insulating layer is supplied to the transistor to recover the damage in it, while hydrogen is suppressed from arriving at the capacitor element so that the capacitor dielectric element does not degrade.

Abstract translation: 半导体器件设置有多层互连和电容器介质元件，其中器件中的晶体管具有非劣化特性，并且抑制了电容器介质元件的劣化。 半导体器件具有通过绝缘层中的接触孔彼此连接的布线层。 绝缘层之一形成为覆盖晶体管上方的区域的至少一部分，并且不覆盖电容器介质元件上方的区域。 通过热处理绝缘层产生的氢气被提供给晶体管以恢复其中的损坏，同时抑制氢气到达电容器元件，使得电容器介质元件不劣化。

公开(公告)号：US6046467A

公开(公告)日：2000-04-04

申请号：US667196

申请日：1996-06-20

Applicant: Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

Inventor： Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/92 ,  H01L29/76

CPC classification number: H01L28/40

Abstract: A capacitor 25 is formed on an insulating layer 21a formed on a semiconductor substrate 21. The end portion of a capacitor insulating layer 23 is positioned between the end portion of a bottom electrode 22 and the end portion of a top electrode 24. A passivation layer 26 for covering the capacitor 25 is formed. Interconnections 28 are connected to the bottom electrode 22 through a first hole 27a and to the top electrode 24 through a second hole 27b. In this way, since the end portion of the capacitor insulating layer 23 is out of the end portion of the top electrode 24, the end portion of the capacitor insulating layer 23 injured by etching does not affect the capacitance.

Abstract translation: 电容器25形成在形成在半导体衬底21上的绝缘层21a上。电容器绝缘层23的端部位于底部电极22的端部和顶部电极24的端部之间。钝化层 形成用于覆盖电容器25的26。 互连件28通过第一孔27a连接到底部电极22，并通过第二孔27b连接到顶部电极24。 以这种方式，由于电容器绝缘层23的端部不在顶部电极24的端部之外，所以通过蚀刻损伤的电容器绝缘层23的端部不影响电容。

公开(公告)号：US5795794A

公开(公告)日：1998-08-18

申请号：US678291

申请日：1996-07-11

Applicant: Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

Inventor： Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC classification number: H01L28/55

Abstract: The present invention relates to method of manufacturing semiconductor devices having built-in capacitor comprising a dielectric substance of high dielectric constant or a ferroelectric substance as the capacitance insulation film, and aims to solve a problem that the prior art capacitance insulation film contained in semiconductor devices has a rough surface which results in a poor insulating voltage and a large spread in electrical characteristics, as well as broken connection wire; in which method a capacitance insulation film is produced by first forming a first dielectric film, and forming a second dielectric film on the first dielectric film for a thickness greater than the difference in level between top and bottom of the surface of first dielectric film, and forming a thin film whose etching speed is identical with that of the second dielectric film on the second dielectric film making the surface of thin film flat, and then etching the whole of the thin film and part of the second dielectric film off simultaneously to make the surface of second dielectric film flat.

Abstract translation: 本发明涉及具有内置电容器的半导体器件的制造方法，该半导体器件包括具有高介电常数的电介质或铁电物质作为电容绝缘膜，并且旨在解决包含在半导体器件中的现有技术的电容绝缘膜的问题 具有粗糙的表面，导致绝缘电压差，电特性扩大，连接线断裂; 在该方法中，通过首先形成第一电介质膜来制造电容绝缘膜，并且在第一电介质膜上形成厚度大于第一电介质膜的表面的顶部和底部之间的电平差的厚度的第二电介质膜，以及 形成薄膜，其蚀刻速度与第二电介质膜的蚀刻速度相同，使得薄膜表面平坦化，然后同时蚀刻整个薄膜和部分第二电介质膜，使得 第二电介质膜的表面平坦。

公开(公告)号：US5627391A

公开(公告)日：1997-05-06

申请号：US492913

申请日：1995-06-20

Applicant: Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

Inventor： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H01L27/115 ,  H01L29/76 ,  H01L23/48 ,  H01L27/108

CPC classification number: H01L27/11502 ,  H01L28/40

Abstract: A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at the bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.

Abstract translation: 半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有接触孔13的第二绝缘膜11，其独立地引导到下电极7和上电极9，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和扩散形成的互连层15 在接触孔13的底部的扩散阻挡层17中形成由粒状晶体构成的层状区域。

公开(公告)号：US08887893B2

公开(公告)日：2014-11-18

申请号：US13339426

申请日：2011-12-29

Applicant: Ryosuke Tsutsumi ,  Hiroaki Murakami ,  Yoshihisa Nagano

Inventor： Ryosuke Tsutsumi ,  Hiroaki Murakami ,  Yoshihisa Nagano

IPC: B23Q7/08 ,  B25J9/00 ,  B23P21/00

CPC classification number: B25J9/0093 ,  B23P21/004 ,  B25J9/0096 ,  Y10S901/16

Abstract: A work system according to embodiments includes a robot and work stations. The robot performs a predetermined work on a workpiece as a work target. The work stations are places where the predetermined work is performed on the workpiece. The robot performs conveying of the workpiece between the work stations.

Abstract translation: 根据实施例的工作系统包括机器人和工作站。 机器人作为工作目标在工件上执行预定的工作。 工作站是在工件上执行预定工作的地方。 机器人在工作站之间执行工件的传送。

公开(公告)号：US20120053724A1

公开(公告)日：2012-03-01

申请号：US13221013

申请日：2011-08-30

Applicant: Takeshi OKAMOTO ,  Kenji Matsufuji ,  Takurou Yano ,  Takuya Murayama ,  Yoshihisa Nagano

Inventor： Takeshi OKAMOTO ,  Kenji Matsufuji ,  Takurou Yano ,  Takuya Murayama ,  Yoshihisa Nagano

IPC: G05D3/12 ,  B25J19/04 ,  B25J13/08

CPC classification number: B25J9/1697 ,  B25J9/1682 ,  G05B2219/39109 ,  G05B2219/40053 ,  Y10S901/30

Abstract: A robot system includes a manipulator; a work table arranged within a movement extent of the manipulator; an imaging unit for taking a two-dimensional image of the workpieces loaded on the work table; a workpiece supply unit for supplying workpieces onto the work table; and a control system for controlling operations of the manipulator and the imaging unit. The control system includes an imaging control unit for controlling the imaging unit to take the two-dimensional image of the workpieces loaded on the work table, a workpiece detecting unit for detecting a position and a posture of each of the workpieces loaded on the work table by comparing the two-dimensional image taken by the imaging unit with templates stored in advance, and a manipulator control unit for operating the manipulator to perform a work with respect to the workpieces detected by the workpiece detecting unit.

Abstract translation: 机器人系统包括操纵器; 布置在机械手的移动范围内的工作台; 用于拍摄加载在工作台上的工件的二维图像的成像单元; 工件供给单元，用于将工件供给到工作台上; 以及用于控制操纵器和成像单元的操作的控制系统。 该控制系统包括：成像控制单元，用于控制成像单元，以取得装载在工作台上的工件的二维图像;工件检测单元，用于检测装载在工作台上的每个工件的位置和姿势 通过将成像单元拍摄的二维图像与预先存储的模板进行比较，以及操作器控制单元，用于操作操纵器以对由工件检测单元检测到的工件进行工作。

公开(公告)号：US07420237B2

公开(公告)日：2008-09-02

申请号：US11035175

申请日：2005-01-14

Applicant: Yoshihisa Nagano ,  Takumi Mikawa

Inventor： Yoshihisa Nagano ,  Takumi Mikawa

IPC: H01L31/062 ,  H01L31/113 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94

CPC classification number: H01L28/65 ,  H01L27/10852 ,  H01L28/57 ,  H01L28/75

Abstract: A capacitor element is provided which is composed of a lower electrode, an upper electrode formed in opposing relation to the lower electrode, and a capacitor dielectric film made of a ferroelectric material or a high dielectric material and formed between the lower and upper electrodes. The lower electrode, the capacitor dielectric film, and the upper electrode are formed in a region extending at least from within a hole provided in an interlayer insulating film having a first hydrogen barrier film disposed on the upper surface thereof toward a position above the hole. A second hydrogen barrier film in contact with the first hydrogen barrier film is disposed to cover the upper surface of the upper electrode and the side surface of the portion of the upper electrode which has been formed above the hole.

Abstract translation: 提供一种电容器元件，其由下电极，与下电极相对形成的上电极和由电介质材料或高电介质材料制成并形成在下电极和上电极之间的电容器电介质膜组成。 下电极，电容器电介质膜和上电极形成在至少从设置在其上表面上的第一氢阻挡膜朝向孔上方的位置的层间绝缘膜的孔内延伸的区域中。 与第一氢阻挡膜接触的第二氢阻挡膜设置成覆盖上电极的上表面和形成在孔上方的上电极部分的侧表面。

公开(公告)号：US20070235787A1

公开(公告)日：2007-10-11

申请号：US11407048

申请日：2006-04-20

Applicant: Yoshihisa Nagano ,  Yuji Judai

Inventor： Yoshihisa Nagano ,  Yuji Judai

IPC: H01L27/108

CPC classification number: H01L28/55 ,  H01L27/11502 ,  H01L27/11507

Abstract: A capacitor device having a three-dimensional structure includes: a lower electrode formed on a semiconductor substrate to have a three-dimensional shape; a capacitor insulating film formed to cover the lower electrode and made of a ferroelectric material; and an upper electrode formed on the capacitor insulating film to have a step portion. A stress control layer is formed on the upper electrode to cause tensile stress and function as a moisture diffusion barrier.

Abstract translation: 具有三维结构的电容器器件包括：形成在半导体衬底上以形成三维形状的下电极; 形成为覆盖下电极并由铁电体材料制成的电容器绝缘膜; 以及形成在电容器绝缘膜上的上电极，以具有台阶部分。 在上部电极上形成应力控制层，产生拉伸应力，作为水分扩散阻挡层发挥作用。