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    Down conversion methodology and topology which compensates for spurious response
    51.
    发明申请
    Down conversion methodology and topology which compensates for spurious response 审中-公开
    降低转换方法和拓扑，补偿杂散响应

    公开(公告)号：US20050226349A1

    公开(公告)日：2005-10-13

    申请号：US10505414

    申请日：2003-02-25

    Applicant: Tajinder Manku

    Inventor： Tajinder Manku

    IPC: H03D7/16 ,  H04L27/06

    CPC classification number: H03D7/16

    Abstract: There is a need for an inexpensive, high-performance, fully-integrable, multistandard transceiver, which suppresses spurious noise signals. The invention provides a topology that satisfies this need, providing a first mixer for receiving an input signal x(t), and mixing it with a multi-tonal mixing signal φ1 to generate an output signal φ1 x(t), and providing a second mixer for receiving the φ1 x(t) signal, and mixing it with a mono-tonal mixing signal φ2, to generate an output signal φ1 φ2 x(t). The two mixing signals emulate an LO signal because φ1*φ2 has significant power at the frequency of the LO signal being emulated. The topology also includes a power measurement circuit for measuring the power of the output signal φ1 φ2 x(t). This power output signal is used to vary the characteristics of the mono-tonal mixing signal φ2 to reduce the power level of said output signal.

    Abstract translation: 需要一种廉价，高性能，完全可集成的多标准收发器，可以抑制杂散噪声信号。 本发明提供了满足这种需求的拓扑结构，提供用于接收输入信号x（t）的第一混频器，并将其与多音调混合信号phi 1混合以产生输出信号phi 1 x（t），并提供 用于接收phi 1 x（t）信号并将其与单声道混合信号phi2混合的第二混频器，以产生输出信号phi 1 phi2 x（t）。 两个混频信号模拟LO信号，因为phi 1 * phi2在被仿真的LO信号的频率处具有显着的功率。 拓扑结构还包括用于测量输出信号phi 1 phi2 x（t）的功率的功率测量电路。 该功率输出信号用于改变单声道混合信号phi 2的特性，以降低所述输出信号的功率电平。

    Capacitance measuring device
    52.
    发明授权
    Capacitance measuring device 失效
    电容测量装置

    公开(公告)号：US5602487A

    公开(公告)日：1997-02-11

    申请号：US294602

    申请日：1994-08-22

    Applicant: Tajinder Manku

    Inventor： Tajinder Manku

    IPC: G01R27/26

    CPC classification number: G01R27/2605

    Abstract: A capacitance measuring device comprises a MOS transistor having a source, drain, and gate; a first capacitor C.sub.1 connected between said gate and said drain so that charge is coupled from said drain onto said gate; and a second capacitor C.sub.2 for connection to a source of gate voltage V.sub.G and connected to said gate. One of the first and second capacitors has a known capacitance and the other has an unknown capacitance. A DC voltage is supplied between the source and drain to cause a saturation current to flow therebetween. The ratio .delta.V.sub.G /.delta.V.sub.d for the saturation current, where V.sub.G is the applied gate voltage, and V.sub.d is the drain voltage is determined and the unknown capacitance is derived from the relationship C.sub.1 /C.sub.2 =-.delta.V.sub.G /.delta.V.sub.d.

    Abstract translation: 电容测量装置包括具有源极，漏极和栅极的MOS晶体管; 连接在所述栅极和所述漏极之间的第一电容器C1，使得电荷从所述漏极耦合到所述栅极上; 以及用于连接到栅极电压VG源并连接到所述栅极的第二电容器C2。 第一和第二电容器之一具有已知的电容，另一个具有未知的电容。 在源极和漏极之间提供直流电压，以使饱和电流在它们之间流动。 确定饱和电流（其中VG为施加的栅极电压）和Vd为漏极电压的饱和电流的比值ΔGV/ΔVd，并且从C1 / C2 =-ΔGV/ΔDd的关系导出未知电容。

    Multi-transport mode devices having improved data throughput
    54.
    发明授权
    Multi-transport mode devices having improved data throughput 有权
    具有改善的数据吞吐量的多传输模式设备

    公开(公告)号：US08707389B2

    公开(公告)日：2014-04-22

    申请号：US12631397

    申请日：2009-12-04

    Applicant: Tajinder Manku

    Inventor： Tajinder Manku

    IPC: G06F21/00

    CPC classification number: H04L67/327 ,  H04L12/5691 ,  H04L45/22 ,  H04L47/14 ,  H04L2012/5624 ,  H04W28/065 ,  H04W28/08 ,  H04W72/1273 ,  H04W76/16 ,  H04W80/00 ,  H04W88/10 ,  H04W88/182

    Abstract: A method for transmitting data between a client and a server is provided. The method comprising the following steps. The data is segmented into a plurality of data packets, which are scheduled to be transmitted via different ones of a plurality of access points. Each of the plurality of access points is configured to communicate with the client using a different protocol and communicate with the server using a different network path. Each of the plurality of data packets is transmitted between the client and the server via the scheduled access point. A client device and proxy server configured to implement the method are also provided, as is a computer readable medium having stored thereon instructions for implementing the method.

    Abstract translation: 提供了一种在客户端和服务器之间传输数据的方法。 该方法包括以下步骤。 数据被分割成多个数据分组，其被调度为经由多个接入点中的不同接入点发送。 多个接入点中的每一个被配置为使用不同的协议与客户端进行通信，并使用不同的网络路径与服务器进行通信。 多个数据分组中的每一个经由调度的接入点在客户机和服务器之间传送。 还提供被配置为实现该方法的客户端设备和代理服务器，以及其上存储有用于实现该方法的指令的计算机可读介质。

    Method and Apparatus for Generating Dedicated Data Channels in Inductive Coupled RFID Systems
    55.
    发明申请
    Method and Apparatus for Generating Dedicated Data Channels in Inductive Coupled RFID Systems 有权
    用于在电感耦合RFID系统中生成专用数据通道的方法和装置

    公开(公告)号：US20130324032A1

    公开(公告)日：2013-12-05

    申请号：US13482008

    申请日：2012-05-29

    Applicant: Tajinder MANKU

    Inventor： Tajinder MANKU

    IPC: H04B5/00

    CPC classification number: H04B5/0062 ,  H04B5/0075 ,  H04B5/0081

    Abstract: An inductive coupling apparatus for modifying an incoming radio frequency (RF) signal includes an inductive element for modifying the incoming RF signal in accordance with a coupled impedance characteristic of the inductive element. A variable impedance circuit includes an output electrically coupled to the inductive element. A low pass delta sigma modulator is coupled to the variable impedance circuit and digitally controls the output of the variable impedance circuit, the coupled impedance of the inductive element being adjusted based on the output of the variable impedance circuit.

    Abstract translation: 用于修改输入射频（RF）信号的电感耦合装置包括用于根据电感元件的耦合阻抗特性修改输入RF信号的电感元件。 可变阻抗电路包括电耦合到电感元件的输出端。 低通量ΔΣ调制器耦合到可变阻抗电路并且数字地控制可变阻抗电路的输出，基于可变阻抗电路的输出来调整电感元件的耦合阻抗。

    Closed-loop digital power control for a wireless transmitter
    56.
    发明授权
    Closed-loop digital power control for a wireless transmitter 有权
    无线发射机的闭环数字功率控制

    公开(公告)号：US08509290B2

    公开(公告)日：2013-08-13

    申请号：US12520448

    申请日：2007-12-21

    Applicant: Abdellatif Bellaouar ,  Tajinder Manku

    Inventor： Abdellatif Bellaouar ,  Tajinder Manku

    IPC: H04B1/38

    CPC classification number: H03G3/3047 ,  H04B2001/0416

    Abstract: A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.

    Abstract translation: 一种用于可变功率输出无线设备的闭环功率输出校准系统。 无线设备包括具有耦合到分立功率放大器的发射芯的无线收发器。 在无线收发器中形成的功率检测电路提供功率放大器的检测功率电平和参考功率电平，两者都使用接收机核心中现有的I和Q信号模数转换器转换成数字信号。 处理数字信号以消除功率失真和温度影响，以提供最终的功率反馈信号。 响应于功率反馈信号相对于期望的功率输出电平产生校正控制信号。 然后响应于校正控制信号调整发送内核中的增益，使得功率放大器输出目标输出功率电平。

    DIGITAL TO ANALOG CONVERTER
    57.
    发明申请
    DIGITAL TO ANALOG CONVERTER 有权
    数字到模拟转换器

    公开(公告)号：US20130082853A1

    公开(公告)日：2013-04-04

    申请号：US13251935

    申请日：2011-10-03

    Applicant: Khurram MUHAMMAD ,  Tajinder Manku ,  Semyon Lebedev

    Inventor： Khurram MUHAMMAD ,  Tajinder Manku ,  Semyon Lebedev

    IPC: H03M1/06 ,  H03M3/02 ,  H03M1/20

    CPC classification number: H03M1/201 ,  H03M1/685 ,  H03M1/687 ,  H03M3/30

    Abstract: A digital-to-analog converter is disclosed. The converter includes a gradient correction module that generates a correction term based on a model of gradient error. The correction term is then applied to the signal path in the digital domain or applied to the output of the digital-to-analog converter in the analog domain. The model used to generate the correction term is based on a vertical gradient error in the array of current source elements, which may be modelled and calibrated using a second-order polynomial. Further, a digital-to-analog converter having a Nyquist DAC and an oversampled DAC is disclosed. When the oversampled DAC is enabled, the resolution of the Nyquist DAC may be increased while slowing the conversion rate.

    Abstract translation: 公开了一种数模转换器。 该转换器包括梯度校正模块，该梯度校正模块基于梯度误差的模型产生校正项。 然后将校正项应用于数字域中的信号路径或应用于模拟域中的数模转换器的输出。 用于产生校正项的模型基于当前源元素阵列中的垂直梯度误差，其可以使用二阶多项式来建模和校准。 此外，公开了具有奈奎斯特DAC和过采样DAC的数模转换器。 当使能过采样DAC时，可能会增加奈奎斯特DAC的分辨率，同时降低转换速率。

    Digital charge pump PLL architecture
    59.
    发明授权
    Digital charge pump PLL architecture 有权
    数字电荷泵PLL架构

    公开(公告)号：US08004326B2

    公开(公告)日：2011-08-23

    申请号：US12515562

    申请日：2007-12-13

    Applicant: Tajinder Manku ,  Christopher Snyder

    Inventor： Tajinder Manku ,  Christopher Snyder

    IPC: H03L7/06

    CPC classification number: H03K5/135 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10

    Abstract: A digital phase lock loop (PLL) circuit having a digital charge pump circuit for providing digital signals corresponding to a difference in phase between an internal clock corresponding to a voltage controlled oscillator, and a reference clock. These digital signals are processed by a digital processing circuit for providing digital control signals. Some of the digital control signals are converted into an analog control signal to provide fine control of the voltage controlled oscillator, while the remaining digital control signals provide coarse control of the voltage controlled oscillator.

    Abstract translation: 一种具有数字电荷泵电路的数字锁相环（PLL）电路，用于提供对应于与压控振荡器相对应的内部时钟之间的相位差的数字信号和参考时钟。 这些数字信号由用于提供数字控制信号的数字处理电路处理。 一些数字控制信号被转换成模拟控制信号以提供压控振荡器的精细控制，而剩余的数字控制信号提供压控振荡器的粗略控制。

    Automatic IIP2 calibration architecture
    60.
    发明授权
    Automatic IIP2 calibration architecture 有权
    自动IIP2校准架构

    公开(公告)号：US07742747B2

    公开(公告)日：2010-06-22

    申请号：US11626964

    申请日：2007-01-25

    Applicant: Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safiri

    Inventor： Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safiri

    IPC: H04B1/04 ,  H04K3/00

    CPC classification number: H04B1/12 ,  H03D2200/0045 ,  H04B17/21

    Abstract: An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.

    Abstract translation: 公开了一种用于无线收发器的综合自动IIP2校准架构。 该架构使得无线收发器能够生成具有最小附加电路的具有二阶音调的测试射频（RF）信号。 特别地，使用本机收发器电路和测试适配器电路的组合产生测试RF信号。 本地收发器电路是在收发器芯片上实现的用于在正常操作期间执行本机收发器功能的那些电路，其可用于产生测试（RF）信号。 测试适配器电路被添加到收发器芯片中，更具体地被添加到本地电路，用于使得本机电路能够以自测试操作模式生成测试RF信号。 用于实现特定的IIP2最小化方案的电路可以在自检操作模式下在收发器芯片中包括在自动IIP2校准中。

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