公开(公告)号：US09672755B2

公开(公告)日：2017-06-06

申请号：US15266810

申请日：2016-09-15

Applicant: Liran Katz

Inventor： Liran Katz

IPC: G09B19/00 ,  G09B5/00 ,  A61B5/00 ,  G01G19/52

CPC classification number: G09B19/00 ,  A61B5/00 ,  A61B5/4833 ,  G01G19/4146 ,  G01G19/52 ,  G09B5/00

Abstract: Systems and methods for rewarding a child for behaving well while dining. One embodiment includes the steps of: generating indications proportional to the weight of food on a plate, calculating the rate of removing the food from the plate (Rr), and comparing Rr with a predetermined max eating rate (Rm). When Rr Rm not commanding the container to switch from the closed state to the open state when the weight of the food on the plate reaches below the predetermined threshold.

公开(公告)号：US09639473B1

公开(公告)日：2017-05-02

申请号：US14934252

申请日：2015-11-06

Applicant: Parallel Machines Ltd.

Inventor： Michael Adda ,  Avner Braverman ,  Lior Amar ,  Dan Aloni ,  Lior Khermosh ,  Gal Zuckerman

IPC: G06F13/00 ,  G06F12/0875 ,  G11C7/10 ,  G06F12/0811 ,  G06F12/1081

CPC classification number: G06F12/0875 ,  G06F12/0811 ,  G06F12/0868 ,  G06F12/0888 ,  G06F12/0893 ,  G06F12/1081 ,  G06F2212/2532 ,  G06F2212/283 ,  G06F2212/452

Abstract: Described herein are systems and methods to prevent a controller in a DDIO (data direct input output) system from shifting currently-required data out of a cache memory. In one embodiment, a compute element disables caching of some specific addresses in a non-cache memory, but still enables caching of other addresses in the non-cache memory, thereby practically disabling the DDIO system, so that data sets not currently needed are placed in the addresses in the non-cache memory which are not cached. As a result, currently-required data are not shifted out of cache memory. The compute element then determines that the data sets, which formerly avoided being cached, are now required. The system therefore copies the data sets that are now required from addresses in non-cache memory not accessible to cache memory, to addresses in non-cache memory accessible to cache memory, thereby allowing the caching and processing of such data sets.

公开(公告)号：US09621612B2

公开(公告)日：2017-04-11

申请号：US14482340

申请日：2014-09-10

Applicant: Valens Semiconductor Ltd.

Inventor： Eyran Lida ,  Aviv Salamon

IPC: H04L12/26 ,  H04L29/06 ,  H04L12/24 ,  H04L12/46 ,  H04L12/911 ,  H04L29/08 ,  H04L12/64

CPC classification number: H04L65/602 ,  H04L12/46 ,  H04L12/6418 ,  H04L29/06 ,  H04L41/14 ,  H04L41/147 ,  H04L43/0852 ,  H04L43/087 ,  H04L43/16 ,  H04L47/70 ,  H04L65/1069 ,  H04L65/4084 ,  H04L65/60 ,  H04L65/605 ,  H04L65/608 ,  H04L65/80 ,  H04L67/141 ,  H04L67/32

Abstract: Methods and systems for calculating latency variations in a distributed manner, including the steps of: calculating, by first and second switches, first and second local latency variations, of first and second streaming sessions, at first and second output ports of the first and second switches, respectively. Receiving, by the third switch, the first and second local latency variations; wherein a first and second paths of the first and second streaming sessions, respectively, are passing through a third output port of the third switch after passing through the first and second output ports, respectively. And calculating, by the third switch, a third local latency variation of the first streaming session at the third output port, based on the first and second local latency variations.

公开(公告)号：US09594719B2

公开(公告)日：2017-03-14

申请号：US14813433

申请日：2015-07-30

Applicant: Valens Semiconductor Ltd.

Inventor： Eyran Lida ,  Aviv Salamon

IPC: G06F13/42 ,  G06F13/364 ,  G06F13/40

CPC classification number: G06F13/4282 ,  G06F13/364 ,  G06F13/404

Abstract: Seamless addition of high bandwidth lanes, including the steps of: sending, by a master, an idle sequence using 7b/10b code words over new high bandwidth lanes in parallel to sending and receiving 8b/10b data with a fixed delay over master-to-slave (m2s) and slave-to-master (s2m) active high bandwidth lanes; sending in parallel a synchronization sequence and a known non-idle sequence during an inter packet gap; utilizing, by the slave, the known non-idle sequence for deskewing the new high bandwidth lanes; and sending, by the master, a transition sequence over both the m2s active high bandwidth lane and the new high bandwidth lanes, and immediately thereafter the master is ready to transmit high bandwidth data using 8b/10b code words over both the m2s active high bandwidth lane and the new high bandwidth lanes.

Abstract translation: 包括以下步骤：无缝地添加高带宽通道，包括以下步骤：由主机通过新的高带宽通道使用7b / 10b码字并行发送和接收具有固定延迟的8b / 10b数据的主/从 -slave（m2s）和slave-to-master（s2m）主动高带宽通道; 在帧间间隔期间并行发送同步序列和已知非空闲序列; 利用从机将已知的非空闲序列用于对新的高带宽通道进行偏移校正; 并且由主机发送在m2s主动高带宽通道和新的高带宽通道上的转换序列，并且在此之后，主机准备好在m2s有效高带宽上使用8b / 10b码字传输高带宽数据 车道和新的高带宽车道。

公开(公告)号：US09594696B1

公开(公告)日：2017-03-14

申请号：US14740793

申请日：2015-06-16

Applicant: Parallel Machines Ltd.

Inventor： Avner Braverman ,  Michael Adda ,  Lior Amar ,  Lior Khermosh ,  Eli Finer ,  Gal Zuckerman

IPC: G06F12/00 ,  G06F12/10 ,  G06F13/16

CPC classification number: G06F9/542 ,  G06F8/10 ,  G06F8/451 ,  G06F9/461 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/5016 ,  G06F9/5066 ,  G06F9/544 ,  G06F11/3624 ,  G06F12/084 ,  G06F12/0846 ,  G06F12/1081 ,  G06F13/1663 ,  G06F2212/2532

Abstract: Various systems and methods to generate automatically a procedure operative to distributively process a plurality of data sets stored on a plurality of memory modules. Under the instruction of the automatically generated procedure, compute elements request data sets relevant to a particular task, such data sets are fetched from memory modules by data interfaces which provide such data sets to the requesting compute elements, and the compute elements then process the received data sets until the task is completed. Relevant data sets are fetched and processed asynchronously, which means that the relevant data sets need not be fetched and processed in any particular order.

Abstract translation: 自动产生用于分配地处理存储在多个存储器模块上的多个数据集的程序的各种系统和方法。 在自动生成过程的指导下，计算单元请求与特定任务相关的数据集，通过数据接口从存储器模块中提取这些数据集，数据接口将这些数据集提供给请求的计算单元，然后计算单元处理接收的 数据集，直到任务完成。 相关数据集被异步取出和处理，这意味着相关数据集不需要以任何特定的顺序被提取和处理。

公开(公告)号：US09588925B2

公开(公告)日：2017-03-07

申请号：US14488388

申请日：2014-09-17

Applicant: Valens Semiconductor Ltd.

Inventor： Aviv Salamon ,  Eyran Lida

IPC: G06F13/20 ,  G06F13/40 ,  G06F13/42 ,  G06F13/38

CPC classification number: G06F13/4022 ,  G06F13/385 ,  G06F13/4282

Abstract: Methods and systems for operating a USB extension over a lossy channel. The USB extension includes at least a state machine and packet loss inference mechanism. The state machine includes a first state in which the USB extension receives a USB data packet from a standard USB host, a second state, unsupported by the USB Specification, in which the packet loss inference mechanism may indicate the state machine to switch back to its first state, and a third state in which the USB extension switches the state machine back to its first state.

Abstract translation: 通过有损通道操作USB扩展的方法和系统。 USB扩展包括至少一个状态机和分组丢失推理机制。 状态机包括第一状态，其中USB扩展接收来自标准USB主机的USB数据分组，第二状态，不支持USB规范，其中分组丢失推理机制可以指示状态机切换回其 第一状态和第三状态，其中USB扩展将状态机切换回其第一状态。

公开(公告)号：US09547553B1

公开(公告)日：2017-01-17

申请号：US14641401

申请日：2015-03-08

Applicant: Spring Microsystems Ltd.

Inventor： Lior Khermosh ,  Avner Braverman ,  Ofir Shalvi ,  Ofer Bar-Or ,  Gal Zuckerman

IPC: G06F11/00 ,  G06F11/10 ,  G11C7/10 ,  G11C29/52

CPC classification number: G11C7/1072 ,  G06F11/10 ,  G06F11/1064 ,  G06F12/0813 ,  G06F12/0868 ,  G06F12/1458 ,  G06F2212/1024 ,  G06F2212/1032 ,  G11C29/52 ,  H03M13/373

Abstract: Various systems to achieve data resiliency in a shared memory pool are presented. Multiple memory modules are associated with multiple data interfaces, one or multiple erasure-coding interfaces are communicatively connected with the multiple data interfaces, and multiple compute elements are communicatively connected with one or multiple erasure-coding interfaces. Data sets are erasure-coded, and the resulting fragments are stored in random access memory modules distributed throughout the system. Storage in RAM allows real-time fetching of fragments using random-access read cycles and streaming of fragments using random-access write cycles, in which read operations include reconstruction of data sets from fetched data fragments, and write operations allow conversion of data sets into fragments which are then streamed and distributively stored. Distributed memory creates data resiliency to reconstruct original data sets in cases such as data corruption, failure of a memory module, failure of a data interface, or failure of a compute element.

Abstract translation: 呈现了在共享存储器池中实现数据弹性的各种系统。 多个存储器模块与多个数据接口相关联，一个或多个擦除编码接口与多个数据接口通信连接，并且多个计算元件与一个或多个擦除编码接口通信连接。 数据集被擦除编码，并且所得到的片段被存储在分布在整个系统中的随机存取存储器模块中。 RAM中的存储器允许使用随机访问读取周期的随机访问读取周期和片段流实时获取片段，其中读取操作包括从获取的数据片段重建数据集，并且写入操作允许将数据集转换为 片段然后流式传播和分布式存储。 在数据损坏，内存模块故障，数据接口故障或计算元件故障的情况下，分布式内存会创建数据弹性来重建原始数据集。

公开(公告)号：US09496593B2

公开(公告)日：2016-11-15

申请号：US13920208

申请日：2013-06-18

Applicant: Siklu Communication Ltd.

Inventor： Elad Dayan ,  Yigal Leiba

IPC: H01P5/107 ,  H01P3/12 ,  H01P1/207 ,  H01P3/00 ,  H01P11/00

CPC classification number: H01P5/107 ,  H01P1/207 ,  H01P3/003 ,  H01P3/12 ,  H01P3/121 ,  H01P11/002

Abstract: Various embodiments of a millimeter-wave system operative to enhance propagation of millimeter-waves inside a laminate waveguide structure, in which electrical energy has leaked outside the laminated waveguide structure. The system comprises a laminate waveguide structure inside a printed circuit board, and an electrically conductive fence also inside the printed circuit board but outside the laminate waveguide structure. In various embodiments, the electrical energy of millimeter-waves leaks outside the laminate waveguide structure and is reflected by the electrically conducive fence back into the laminate waveguide structure.

公开(公告)号：US09374252B2

公开(公告)日：2016-06-21

申请号：US14338548

申请日：2014-07-23

Applicant: Valens Semiconductor Ltd.

Inventor： Zeev Brunin ,  Itamar Nizan ,  Alon Benzaray ,  Eyran Lida

IPC: H04L25/49

CPC classification number: H04L25/4906 ,  H04L25/14 ,  H04L25/4917

Abstract: Method and devices for generating a parallel binary representation of an HDBaseT® physical modulation. The method and devices include generating series-consisting-4-binary-symbols, each represents a physical modulation of one HDBaseT compliant symbol. The series-consisting-4-binary-symbols are transmitted over eight binary channels, where each series-consisting-4-binary-symbols is transmitted serially over one of the binary channels using transmission rate that is twice the HDBaseT rate.

Abstract translation: 用于生成HDBaseT®物理调制的并行二进制表示的方法和设备。 该方法和装置包括产生串联组合的四进制二进制符号，每个代表一个符合HDBaseT标准的物理调制。 串联组合的4位二进制符号通过八个二进制通道发送，其中每个串联的四位二进制符号通过使用两倍于HDBaseT速率的传输速率在一个二进制通道上串行发送。

公开(公告)号：US09239777B1

公开(公告)日：2016-01-19

申请号：US14141655

申请日：2013-12-27

Applicant: Panaya Ltd.

Inventor： Yossi Cohen ,  Mati Cohen ,  Nurit Dor ,  Dror Weiss

IPC: G06F9/44 ,  G06F13/10 ,  G06F13/12 ,  G06F11/00 ,  G06F9/455 ,  G06F17/50 ,  G06F9/45 ,  G06F11/36

CPC classification number: G06F11/3684 ,  G06F8/30 ,  G06F11/368 ,  G06F11/3696

Abstract: System, method, and non-transitory medium for generating a test scenario template from a cluster of similar partial runs of test scenarios involves executing the following: identifying runs of test scenarios run by users on software systems that belong to different organizations; generating partial runs of the test scenarios by extracting from each run of a test scenario data pertaining to a proper subset of the plurality of test steps described in the run; clustering the partial runs of the test scenarios into clusters of similar partial runs; receiving a profile of a user; selecting, based on the profile, from among the clusters a certain cluster suitable for the user; and generating a test scenario template based on partial runs belonging to the certain cluster.

Abstract translation: 用于从类似部分测试场景运行的集群中生成测试场景模板的系统，方法和非暂时介质包括执行以下操作：识别用户在属于不同组织的软件系统上运行的测试场景运行; 通过从测试场景的每次运行中提取与运行中描述的多个测试步骤的适当子集有关的数据来产生测试场景的部分运行; 将测试场景的部分运行聚类成类似部分运行的集群; 接收用户的简档; 基于简档，从群集中选择适合于用户的某个群集; 以及基于属于该特定集群的部分运行生成测试场景模板。