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公开(公告)号：US10270542B2
公开(公告)日：2019-04-23
申请号：US16142138
申请日：2018-09-26
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
Abstract: Methods and systems for fast convergence. One embodiment includes the following steps: extracting a digital representation of a common mode signal of a received differential signal sent by a transceiver, and generating, by a fast-adaptive mode-conversion canceller (FA-MCC), a compensation signal to mitigate differential interference; feeding the received differential signal to at least one of the following: a digital equalizer, and a digital canceller (DEDC); wherein the FA-MCC and the DEDC feed a slicer; responsive to receiving an indication that a serious differential interference has occurred, indicating the transceiver to transmit known data; and utilizing the received known data for improving the accuracy of the slicer's errors, which enables rapid adaptation of the FA-MCC to a level that mitigates the serious differential interference and enables requesting retransmission of erred packets fast enough to maintain a fixed rate of data transmission over a 2-millisecond window.
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公开(公告)号：US10171182B2
公开(公告)日：2019-01-01
申请号：US15169914
申请日：2016-06-01
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
Abstract: Methods and systems for fast recovery, such as a transceiver that assists a second transceiver to recover rapidly from quality degradation. In one embodiment, the transceiver includes a receiver and a transmitter. The receiver receives from the second transceiver an indication to transmit known data, wherein utilizing the known data enables the second transceiver to recover within less than 1 millisecond from the quality degradation. And the transmitter transmits the known data, wherein the known data comprises bitwise complement code words of an idle sequence, and each bitwise complement code word appears in the idle sequence.
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3.发明申请Mode-conversion digital canceller for high bandwidth differential signaling 审中-公开用于高带宽差分信号的模数转换数字消除器公开(公告)号：US20160277127A1
公开(公告)日：2016-09-22
申请号：US15170019
申请日：2016-06-01
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
CPC classification number: H04B15/00 , H04B1/1027 , H04B1/38 , H04L25/0276 , H04L25/03885
Abstract: Systems and methods for recovering rapidly from a mode-conversion of a common mode interference. One exemplary transceiver includes: a slicer configured to generate slicing decisions and slicing errors based on a differential signal, transmitted at a rate above 500 Mbps, which is received from a second transceiver; and a common mode sensor analog front end (CMS-AFE) configured to sense a common mode component of the differential signal. The CMS-AFE is coupled to a fast-adaptive mode-conversion canceller (FA-MCC) configured to generate a compensation signal that compensates for differential interferences that are correlated with the common mode component. Wherein, within less than 1 millisecond from an occurrence of a differential interference that causes the packet loss to exceed 10% as a result of the mode-conversion, the transceiver is configured to utilize the slicing errors to adapt the FA-MCC to a level that reduces the packet loss rate to below 1%.
Abstract translation: 从共模干扰的模式转换中快速恢复的系统和方法。 一个示例性收发器包括：限幅器，被配置为基于从第二收发器接收的以高于500Mbps的速率发送的差分信号生成限幅判定和限幅误差; 以及被配置为感测差分信号的共模分量的共模传感器模拟前端（CMS-AFE）。 CMS-AFE耦合到配置为产生补偿与共模分量相关的差分干扰的补偿信号的快速自适应模式转换消除器（FA-MCC）。 其中，在由于模式转换而导致分组丢失超过10％的差分干扰的不到1毫秒内，收发器被配置为利用限幅误差来使FA-MCC适应水平 将丢包率降低到1％以下。
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公开(公告)号：US09407394B2
公开(公告)日：2016-08-02
申请号：US14483811
申请日：2014-09-11
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon
IPC: H04L1/16 , H04J13/00 , H04L5/14 , H04L12/801 , H04L12/851
CPC classification number: H04J13/0003 , H04L1/0003 , H04L5/14 , H04L5/1453 , H04L25/4908 , H04L47/127 , H04L47/2441
Abstract: Implementing flow control without using unique symbols or designated packets, comprising: sending, from a first device to a second device, high throughput packet communication. Temporarily storing the high throughput packet communication in a buffer of the second device. Calculating, by the second device, a basic idle code word sequence known to the first device. Producing an idle sequence by replacing certain M code words of the basic idle sequence with M bitwise complement code words. Transmitting the idle sequence, wherein the M bitwise complement code words are indicative of the fullness of the buffer. Receiving the idle sequence by the first device, and determining, based on a difference between the idle sequence and the basic idle sequence, that the buffer is full or expected to get full, and thus the first device stop sending packets to the second device.
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公开(公告)号：US09401729B2
公开(公告)日：2016-07-26
申请号：US14170826
申请日：2014-02-03
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon
CPC classification number: H03M13/19 , H03M5/00 , H03M5/04 , H03M5/14 , H03M5/18 , H04L1/0041 , H04L1/0057 , H04L25/4908
Abstract: Methods and systems for encoding a frame utilizing at least two line-codes having different minimal Hamming distances. The method includes maintaining over the frame absolute value of running disparity lower than or equal to K, while: encoding a first part of the frame utilizing a first line-code having a binary code word length N′ and a minimal Hamming distance D′; and encoding a second part of the frame utilizing a second line-code having a binary code word length N″ and a minimal Hamming distance D″ lower than D′. Where the value of K is lower than both N′/2 and N″/2.
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Patent Agency Ranking
公开(公告)号：US09270415B2
公开(公告)日：2016-02-23
申请号：US14170852
申请日：2014-02-03
Applicant: Valens Semiconductor Ltd.
Inventor： Aviv Salamon , Eyran Lida
CPC classification number: H04L1/0041 , H03M5/00 , H03M5/04 , H04L1/0057 , H04L1/007
Abstract: Methods and systems for encoding frames while maintaining bounded running disparity, including: encoding the headers of the frames utilizing a first line-code; selecting the first line-code and a second line code for encoding first and second payloads of first and second frames, respectively, based on first and second data types of first and second data comprised in the first and second payloads, respectively; encoding the first and second payloads utilizing the first and second line-codes, respectively; and transmitting the first and second frames over a communication channel characterized by first and second channel conditions, respectively. The second line-code has a minimal Hamming distance lower than that of the first line-code, and the differences between the first and second channel conditions are not enough for selecting the second line-code instead of the first line-code for encoding the second payload.
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公开(公告)号：US20150222293A1
公开(公告)日：2015-08-06
申请号：US14170826
申请日：2014-02-03
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon
CPC classification number: H03M13/19 , H03M5/00 , H03M5/04 , H03M5/14 , H03M5/18 , H04L1/0041 , H04L1/0057 , H04L25/4908
Abstract: Methods and systems for encoding a frame utilizing at least two line-codes having different minimal Hamming distances. The method includes maintaining over the frame absolute value of running disparity lower than or equal to K, while: encoding a first part of the frame utilizing a first line-code having a binary code word length N′ and a minimal Hamming distance D′; and encoding a second part of the frame utilizing a second line-code having a binary code word length N″ and a minimal Hamming distance D″ lower than D′. Where the value of K is lower than both N′/2 and N″/2.
Abstract translation: 用于使用具有不同最小汉明距离的至少两个线代码编码帧的方法和系统。 该方法包括：将运行视差的帧绝对值维持在K以下，同时使用具有二进制码字长度N'和最小汉明距离D'的第一行码来对帧的第一部分进行编码; 并且利用具有低于D'的二进制码字长度N“和最小汉明距离D的第二行码来编码帧的第二部分。 其中K的值低于N'/ 2和N“/ 2。
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公开(公告)号：US20150063475A1
公开(公告)日：2015-03-05
申请号：US14536656
申请日：2014-11-09
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Gaby Gur Cohen , Aviv Salamon
CPC classification number: H04L27/0008 , H03M13/09 , H04L1/00 , H04L1/0003 , H04L1/0036 , H04L5/0007 , H04L5/0044 , H04L25/03006 , H04L25/03057 , H04L25/03146 , H04L25/062 , H04L27/0012 , H04L2025/03363
Abstract: Receivers configured to handle dynamically modulated symbols. One receiver includes a slicer, a physical coding sublayer (PCS), and a decision based filter (DBF). Each of most of the received frames comprising (i) modulation information modulated according to a predetermined modulation order, and (ii) symbols of at least two different modulation orders that are dynamically modulated in accordance with the modulation information. The slicer configured to feed the PCS with essentially the minimal combination of slicing results that essentially covers all the predetermined modulation order. And the PCS configured to identify the modulation information, to use the identified modulation information to determine the modulation of the dynamically modulated symbols, and to provide the slicer with an indication of which slicer function output to use to feed the DBF.
Abstract translation: 配置为处理动态调制符号的接收器。 一个接收机包括限幅器，物理编码子层（PCS）和基于决策的滤波器（DBF）。 大多数接收帧中的每一个包括（i）根据预定调制阶调制的调制信息，和（ii）根据调制信息动态调制的至少两个不同调制阶的符号。 切片机被配置为以基本上覆盖所有预定调制顺序的切片结果的基本上最小的组合来馈送PCS。 并且PCS被配置为识别调制信息，以使用所识别的调制信息来确定动态调制符号的调制，并为切片器提供用于馈送DBF的切片器功能输出的指示。
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公开(公告)号：US10523339B2
公开(公告)日：2019-12-31
申请号：US16142160
申请日：2018-09-26
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
Abstract: Methods and systems for rapidly recovering from a serious interference. One method includes the following steps: transmitting, by a transmitter to a transceiver over a communication channel, ongoing data at a fixed data rate above 100. Mbps; receiving, by a receiver from the transceiver, an indication indicating that the transceiver is experiencing a serious interference; responsive to the indication, reducing data rate at which the transmitter transmits; storing excess data that cannot be sent during the period of the reduced data rate; and increasing the data rate, at which the transmitter transmits, to a level that enables it to transmit, within less than 1 millisecond from the moment of reducing the data rate, both the stored excess data and the ongoing data at the fixed data rate.
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公开(公告)号：US09685991B2
公开(公告)日：2017-06-20
申请号：US15169961
申请日：2016-06-01
Applicant: Valens Semiconductor Ltd.
Inventor： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
CPC classification number: H04B1/74 , H04B1/0475 , H04L25/03885 , H04L47/25
Abstract: Methods and systems for fast recovery from serious differential interferences. An exemplary method includes the following steps: transmitting, by a transmitter to a transceiver, at a fixed data rate above 100 Mbps; receiving, by a receiver from the transceiver, an indication indicating that the transceiver is experiencing a serious interference; responsive to the indication, reducing the data rate at which the transmitter transmits; storing excess data that could not be sent during the period of the reduced data rate; and increasing, within less than 1 millisecond, the data rate at which the transmitter transmits to a level that enables it to transmit both the stored excess data and the ongoing data at the fixed data rate.
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