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公开(公告)号：US09755818B2
公开(公告)日：2017-09-05
申请号：US14491884
申请日：2014-09-19
Applicant: QUALCOMM Incorporated
Inventor： Shoichiro Sengoku
CPC classification number: H04L7/0087 , H04L7/0008 , H04L7/0276 , H04L7/033 , H04L7/04 , H04L25/14
Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. A first transition may be detected in a signal carried on a data lane of a data communications link or carried on a timing lane of the data communications link and an edge may be generated on a receiver clock signal based on the first transition. Data may be captured from the data lane using the receiver clock signal. The timing lane may carry a clock signal, a strobe signal or another signal providing timing information. The strobe signal may transition between signaling states when no state transition occurs on any of a plurality of data lanes at a boundary between consecutive data periods.
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公开(公告)号：US09729229B2
公开(公告)日：2017-08-08
申请号：US14782831
申请日：2013-04-09
Applicant: NEC Corporation
Inventor： Emmanuel Le Taillandier De Gabory , Toshiharu Ito , Manabu Arikawa
IPC: H04B10/61 , H04J14/00 , H04B10/077 , H04J14/04 , H04L25/14 , H04B10/2581
CPC classification number: H04B10/0775 , H04B10/2581 , H04B10/611 , H04B10/615 , H04B10/6163 , H04B10/6164 , H04B10/6165 , H04J14/00 , H04J14/04 , H04L25/14
Abstract: The reception (102) reception unit includes; a first processing unit processing a first signal received from a source channel, and including a filtering unit to filter said first signal in digital domain, and extract unit to extract a information from said first signal; a second processing unit processing a second signal received from a destination channel, and said source channel and said destination channel are distinct each other; a third processing unit providing said information extracted from said first signal to said second signal said third processing unit executes; providing said information from said first processing unit to said second processing unit using information lanes of a clock rate strictly lower than a symbol rate of said second signal, a monitoring unit to generate a monitor signal according to the quality of said second signal; and a control unit controlling a skew between said first signal and said second signal in a bandwidth of said filtering units in said first processing unit.
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公开(公告)号：US09705477B2
公开(公告)日：2017-07-11
申请号：US14845242
申请日：2015-09-03
Applicant: Innovation Digital, LLC
Inventor： Scott R. Velazquez
IPC: H03M1/06 , H03H21/00 , H03F1/32 , H04L25/02 , H04L25/14 , H04L27/26 , H04L27/00 , H03M1/12 , H03M1/66
CPC classification number: H03H21/0067 , H03F1/3241 , H03F1/3247 , H03M1/0612 , H03M1/12 , H03M1/66 , H04B1/0475 , H04B2001/0425 , H04B2001/0441 , H04L25/02 , H04L25/14 , H04L27/0006 , H04L27/0012 , H04L27/265
Abstract: The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The compensator effectively removes nonlinear distortion in these systems in a computationally efficient hardware or software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results. For extremely wideband applications, the multi-rate Volterra filters are implemented in a demultiplexed polyphase configuration which performs the filtering in parallel at a significantly reduced data rate. The compensator is calibrated with an algorithm that iteratively subtracts an error signal to converge to an effective compensation signal. The algorithm is repeated for a multiplicity of calibration signals, and the results are used with harmonic probing to accurately estimate the Volterra filter kernels. The compensator improves linearization processing performance while significantly reducing the computational complexity compared to a traditional nonlinear compensator.
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公开(公告)号：US20170149588A1
公开(公告)日：2017-05-25
申请号：US15416800
申请日：2017-01-26
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: H04L25/14 , H04B1/00 , H04B1/006 , H04B1/28 , H04L7/033 , H04L25/49 , H04W24/02 , H04W88/00
Abstract: A transceiver includes: a baseband control apparatus (21); an up-conversion apparatus (22), connected to the baseband control apparatus (21), and configured to perform up-conversion on a baseband signal generated by the baseband control apparatus (21), to obtain an intermediate frequency signal; at least two radio frequency channels (23) disposed in parallel, connected to the up-conversion apparatus (22), and configured to perform frequency conversion, amplification, and filtering on the intermediate frequency signal, to obtain a radio frequency signal corresponding to the frequency band covered by the each radio frequency channel; and an antenna (24), connected in series with an output end of any radio frequency channel of the at least two radio frequency channels (23), and configured to transmit the radio frequency signal obtained by the radio frequency channel. The transceiver enables relatively high wireless communication performance when an ultra wide bandwidth is implemented.
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45.发明授权公开(公告)号：US09634871B2
公开(公告)日：2017-04-25
申请号：US14864662
申请日：2015-09-24
Applicant: Huawei Technologies Co., Ltd.
Inventor： Weidong Yu
CPC classification number: H04L25/14 , H04W24/04 , H04W88/085 , H04W92/12
Abstract: A method for transmitting Common Public Radio Interface (CPRI) data in a radio base station is provided, which is applicable to the radio base station having at least two CPRI links between a Radio Equipment Control (REC) and a Radio Equipment (RE). The method includes: dividing, by the REC, in-phase/quadrature phase (I/Q) data that needs to be transmitted to the RE into multiple paths of I/Q data with different content, where the multiple paths of I/Q data with different content make up the I/Q data before being divided; transmitting, by the REC, all paths of divided I/Q data to the RE over the at least two CPRI links.
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Patent Agency Ranking
公开(公告)号：US09608865B2
公开(公告)日：2017-03-28
申请号：US14327085
申请日：2014-07-09
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Bruce McLoughlin , Yulianto Kokasih Ko , Qizhong Chen , Jyh Wen Simon Chen
CPC classification number: H04L41/0813 , H04L25/14 , H04L41/083
Abstract: Methods and systems are providing for configuring a port on a network device for communication with a port on a remote device. In one example, the network device receives, by a local port, a message from a physical coding sublayer (PCS) transmitter on the remote partner device. In one aspect, a port configuration module partitions the port to transfer data on a plurality of sub-ports each having a second data transfer rate if it is determined, by the network device that a local PCS receiver failed to align data received in the message. In another aspect, the port configuration module aggregates the plurality of sub-ports of the port to transfer data on a port having the first data transfer rate if it is determined, by the network device, that the local PCS receiver detected a code violation error in the message on at least one of the plurality of sub-links.
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47.发明授权Method and apparatus for determining data is available using a virtual time base 有权用于确定数据的方法和装置可以使用虚拟时基公开(公告)号：US09596495B2
公开(公告)日：2017-03-14
申请号：US14697048
申请日：2015-04-27
Applicant: TVWorks, LLC
Inventor： Brian Bulkowski , Carolyn Wales , Sam Hsu , James Helman , Joseph Decker , Brock Wagenaar , Mark Vickers
IPC: H04N21/236 , H04N21/4627 , H04N21/81 , H04N21/254 , H04J3/04 , H04L29/06 , G06F12/14 , G06F21/62 , H04J3/12 , H04L25/14 , H04N21/434 , H04J3/06 , H04N21/4385 , H04N21/235 , H04N21/858 , H04N7/088 , H04N7/173 , H04N9/82 , H04N21/262 , H04N21/435 , H04N21/462 , H04N21/654 , H04N21/8547 , H04N5/44
CPC classification number: H04N21/23614 , G06F12/1491 , G06F21/6218 , H04J3/047 , H04J3/0685 , H04J3/12 , H04L25/14 , H04L63/105 , H04N5/4401 , H04N7/088 , H04N7/17318 , H04N9/8205 , H04N21/235 , H04N21/23602 , H04N21/2541 , H04N21/262 , H04N21/4341 , H04N21/4344 , H04N21/435 , H04N21/4385 , H04N21/4622 , H04N21/4627 , H04N21/654 , H04N21/8126 , H04N21/8173 , H04N21/8547 , H04N21/858 , H04N21/8586
Abstract: The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution.
Abstract translation: 本发明提供了解决和解决当前影响提供增强型TV的能力的问题的方法和装置，特别是有关定时和同步的问题，与STB中的其它模块的交互以及分发。
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公开(公告)号：US09584307B2
公开(公告)日：2017-02-28
申请号：US14594224
申请日：2015-01-12
Applicant: FUJITSU LIMITED
Inventor： Hayato Furukawa , Wataru Odashima , Shota Shinohara , Toru Katagiri
CPC classification number: H04L7/0075 , H04J3/0605 , H04J3/1652 , H04L25/14
Abstract: A transmission apparatus includes: a plurality of logical lanes; a receiver configured to receive a signal including synchronization information of a frame; a distributor configured to divide data included in the received signal into frame elements and cause the plurality of logical lanes to store the data; and a transmitter configured to transmit the data stored in the logical lanes to lines corresponding to the logical lanes. When the data is stored in the plurality of logical lanes, the distributor groups the logical lanes into a plurality of groups and associates the frame elements with the synchronization information.
Abstract translation: 发送装置包括：多个逻辑通道; 接收器，被配置为接收包括帧的同步信息的信号; 配置成将包含在接收信号中的数据划分为帧单元并使多条逻辑通道存储数据的分配器; 以及发射机，被配置为将存储在逻辑车道中的数据发送到对应于逻辑车道的线路。 当数据存储在多个逻辑通道中时，分配器将逻辑通道分组成多个组并将帧元素与同步信息相关联。
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公开(公告)号：US20160380755A1
公开(公告)日：2016-12-29
申请号：US15262280
申请日：2016-09-12
Applicant: QUALCOMM Incorporated
Inventor： Shoichiro Sengoku
CPC classification number: H04L7/0087 , H04L7/0008 , H04L7/0276 , H04L7/033 , H04L7/04 , H04L25/14
Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. A first transition may be detected in a signal carried on a data lane of a data communications link or carried on a timing lane of the data communications link and an edge may be generated on a receiver clock signal based on the first transition. Data may be captured from the data lane using the receiver clock signal. The timing lane may carry a clock signal, a strobe signal or another signal providing timing information. The strobe signal may transition between signaling states when no state transition occurs on any of a plurality of data lanes at a boundary between consecutive data periods.
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公开(公告)号：US09521265B2
公开(公告)日：2016-12-13
申请号：US14831419
申请日：2015-08-20
Applicant: INTEL CORPORATION
Inventor： Peter N. Heller , Edmund C. Reiter , Michael A. Tzannes
CPC classification number: H04M11/062 , H04B1/0067 , H04L5/20 , H04L12/2898 , H04L25/14 , H04L27/122 , H04M11/066
Abstract: An alternative approach to coping with the ever increasing demand for faster communications hardware is to design modems that are capable of operating its speeds at a higher data rate than a speed required for a single port of the standard communication rate for that modem. Basically, by utilizing a resource manager, that directs the data in and out of the various portions of the modem in an orderly manner, keeping track of which of the ports is being operated at any given point in time, a standard single port modem can be reconfigured, for example, at an over clocked rate, to manipulate the data input and output of a modem.
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