Compensation for digitally controlled oscillator apparatus and method
    41.
    发明授权
    Compensation for digitally controlled oscillator apparatus and method 有权
    数字振荡器装置及方法的补偿

    公开(公告)号:US09071253B2

    公开(公告)日:2015-06-30

    申请号:US13997589

    申请日:2011-11-09

    Applicant: Shenggao Li

    Inventor: Shenggao Li

    Abstract: Automatic digital sensing and compensation of frequency drift caused by temperature, aging, and/or other effects may be provided by including a compensation capacitor array and a sensing logic. The sensing logic may be configured to detect a drift in a first control signal and to provide the compensation capacitor array with a second control signal. The second control signal is configured to cause an adjustment of capacitance in the compensation capacitor array based on the detected drift in the first control signal.

    Abstract translation: 可以通过包括补偿电容器阵列和感测逻辑来提供由温度,老化和/或其他效应引起的频率漂移的自动数字感测和补偿。 感测逻辑可以被配置为检测第一控制信号中的漂移并且向补偿电容器阵列提供第二控制信号。 第二控制信号被配置为基于检测到的第一控制信号的漂移来调整补偿电容器阵列中的电容。

    Integrated circuit device and method for generating a tuning signal for calibrating a voltage controlled oscillator
    42.
    发明授权
    Integrated circuit device and method for generating a tuning signal for calibrating a voltage controlled oscillator 有权
    用于产生用于校准压控振荡器的调谐信号的集成电路装置和方法

    公开(公告)号:US09065450B2

    公开(公告)日:2015-06-23

    申请号:US13635006

    申请日:2010-06-29

    Abstract: An integrated circuit device comprises tuning signal circuitry for generating a tuning signal for calibrating a voltage controlled oscillator (VCO). The tuning signal circuitry is arranged to receive a target voltage signal that is representative of a target voltage across at least one passive element within a resonant tank circuit of a VCO that is being calibrated, generate a VCO simulation signal representative of an average voltage difference across at least one active component of the VCO that is being calibrated, and output a tuning signal based at least partly on the received target voltage signal and the generated VCO simulation signal.

    Abstract translation: 集成电路器件包括用于产生用于校准压控振荡器(VCO)的调谐信号的调谐信号电路。 调谐信号电路被布置成接收代表被校准的VCO的谐振回路内的至少一个无源元件上的目标电压的目标电压信号,产生代表跨越的VCO的平均电压差的VCO模拟信号 被校准的VCO的至少一个有源分量,并且至少部分地基于所接收的目标电压信号和所生成的VCO模拟信号来输出调谐信号。

    HIGH-PRECISION OSCILLATOR
    43.
    发明申请
    HIGH-PRECISION OSCILLATOR 有权
    高精度振荡器

    公开(公告)号:US20150137897A1

    公开(公告)日:2015-05-21

    申请号:US14459291

    申请日:2014-08-13

    CPC classification number: H03L1/04 H03K3/011 H03K3/0322 H03L1/00 H03L1/022

    Abstract: A high-precision oscillator includes a voltage reference module which includes multiple measured Field Effect Transistors and arranged for detecting process corners for the measured Field Effect Transistors to generate a reference voltage containing process corner information of the measured Field Effect Transistors, a compensation current generating module which is arranged for receiving the reference voltage, making a temperature compensation for the reference voltage, and generating a compensation current which includes both the process compensation and temperature compensation, and a ring oscillator which is arranged for receiving the compensation current and outputting a clock with stable frequency. The high-precision oscillator designs the process compensation and the temperature compensation separately, which are adjustable due to one of them will not be influenced by the other; and frequency of its outputted clock is not influenced by process and temperature, thereby precision of the outputted clock is improved.

    Abstract translation: 高精度振荡器包括电压参考模块,其包括多个测量的场效应晶体管,并被布置用于检测所测量的场效应晶体管的处理角,以产生包含测量的场效应晶体管的过程角信息的参考电压,补偿电流产生模块 其布置用于接收参考电压,对参考电压进行温度补偿,并产生包括过程补偿和温度补偿的补偿电流,以及环形振荡器,其被布置为接收补偿电流并输出具有 稳定频率。 高精度振荡器分别设计过程补偿和温度补偿,由于其中的一个不会受另一个影响; 其输出时钟的频率不受过程和温度的影响,从而提高了输出时钟的精度。

    OSCILLATION CIRCUIT, ELECTRONIC APPARATUS, MOVING OBJECT, AND METHOD FOR MANUFACTURING OSCILLATION CIRCUIT
    44.
    发明申请
    OSCILLATION CIRCUIT, ELECTRONIC APPARATUS, MOVING OBJECT, AND METHOD FOR MANUFACTURING OSCILLATION CIRCUIT 审中-公开
    振荡电路,电子设备,移动对象和制造振荡电路的方法

    公开(公告)号:US20150084711A1

    公开(公告)日:2015-03-26

    申请号:US14486079

    申请日:2014-09-15

    Inventor: Yosuke ITASAKA

    CPC classification number: H03L1/00 H03B5/362 H03B5/366

    Abstract: An oscillation circuit includes an oscillation amplifier circuit that causes an oscillating element to oscillate to generate an oscillation signal, and a correction circuit connected with the oscillation amplifier circuit. At least a power supply voltage is input to the oscillation amplifier circuit. The oscillation amplifier circuit has a frequency variation characteristic that the frequency of the oscillation signal varies in response to variations in the power supply voltage. The power supply voltage is input to the correction circuit. The correction circuit corrects the frequency variation characteristic by using variations in the power supply voltage. The correction circuit may include a first variable capacitance element, and the first variable capacitance element may have a capacitance-voltage characteristic by which the frequency variation characteristic is reduced.

    Abstract translation: 振荡电路包括使振荡元件振荡以产生振荡信号的振荡放大器电路,以及与振荡放大器电路连接的校正电路。 至少将电源电压输入到振荡放大器电路。 振荡放大器电路具有频率变化特性,其振荡信号的频率根据电源电压的变化而变化。 电源电压被输入到校正电路。 校正电路通过使用电源电压的变化来校正频率变化特性。 校正电路可以包括第一可变电容元件,并且第一可变电容元件可以具有频率变化特性降低的电容 - 电压特性。

    DESIGN STRUCTURE FOR AN INDUCTOR-CAPACITOR VOLTAGE-CONTROLLED OSCILLATOR
    45.
    发明申请
    DESIGN STRUCTURE FOR AN INDUCTOR-CAPACITOR VOLTAGE-CONTROLLED OSCILLATOR 有权
    电感电容电压控制振荡器的设计结构

    公开(公告)号:US20150002237A1

    公开(公告)日:2015-01-01

    申请号:US14491037

    申请日:2014-09-19

    Abstract: Embodiments of the present invention provide a design structure and method for compensating for a change in frequency of oscillation (FOO) of an LC-tank VCO that includes a first node; second node; inductor; first capacitive network (FCN) that allows the design structure to obtain a target FOO; compensating capacitive (CCN) network that compensates for a change in the design structure's FOO; second capacitive network (SCN) that allows the design structure to obtain a desired FOO; a filter that supplies a voltage to the SCN and is coupled to the SCN; a transconductor that compensates for a change in the design structure's FOO; and a sub-circuit coupled to the SCN that generates and supplies voltage to the CCN sufficient to allow the CCN to compensate for a reduction in the design structure's FOO. The first and second nodes are coupled to the inductor, FCN, CCN, SCN, and sub-circuit.

    Abstract translation: 本发明的实施例提供了一种用于补偿包括第一节点的LC槽VCO的振荡频率(FOO)变化的设计结构和方法; 第二节点 电感; 第一电容网络(FCN),允许设计结构获得目标FOO; 补偿电容(CCN)网络,补偿设计结构的FOO的变化; 第二电容网络(SCN),其允许设计结构获得期望的FOO; 一个向SCN提供电压并耦合到SCN的滤波器; 一种补偿设计结构FOO变化的跨导体; 以及耦合到SCN的子电路,其产生并向CCN提供足够的电压以允许CCN补偿设计结构的FOO的减少。 第一和第二节点耦合到电感器,FCN,CCN,SCN和子电路。

    MULTI-POWER MODE REFERENCE CLOCK WITH CONSTANT DUTY CYCLE
    47.
    发明申请
    MULTI-POWER MODE REFERENCE CLOCK WITH CONSTANT DUTY CYCLE 有权
    具有恒定占空比的多功能模式参考时钟

    公开(公告)号:US20140253251A1

    公开(公告)日:2014-09-11

    申请号:US13787230

    申请日:2013-03-06

    CPC classification number: H03L5/02 H03L1/00

    Abstract: A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.

    Abstract translation: 一种用于在多功率振荡器中保持基准时钟信号的基本恒定的占空比的电源管理装置和方法包括与第二输出功率晶体管和开关的串联装置电并联的第一输出功率晶体管,以及 电容耦合到第一和第二输出功率晶体管的公共栅极的晶体振荡器,其中当开关断开时,参考时钟信号功率输出的电平是正常功率电平,并且参考时钟信号功率输出的电平更高 当开关闭合以与第一输出功率晶体管并联操作第二输出功率晶体管时的功率电平。

    Phase Locked Loop and Method for Operating the Same
    48.
    发明申请
    Phase Locked Loop and Method for Operating the Same 有权
    锁相环及其操作方法

    公开(公告)号:US20140210529A1

    公开(公告)日:2014-07-31

    申请号:US13754168

    申请日:2013-01-30

    Abstract: The invention generally relates to phase locked loops (PLL), and more specifically to ultra-low bandwidth phase locked loops. The invention may be for example embodied in an integrated circuit implementing a phase locked loop or a method for operating a phase locked loop. The invention provides a PLL with a control stage that uses only two storage cells, a counter and a digital-to-analog (DAC) converter. In comparison to prior-art PLLs using storage cells the configuration of the invention's control stage reduces the chip area required for the PLL reduced. The invention further suggests PVT compensation mechanisms for a PLL and implementing a PLL that has lower peaking in its frequency response, which results in better settling response.

    Abstract translation: 本发明一般涉及锁相环(PLL),更具体地涉及超低带宽锁相环。 本发明可以例如体现在实现锁相环的集成电路或用于操作锁相环的方法中。 本发明提供具有仅使用两个存储单元,计数器和数模(DAC)转换器的控制级的PLL。 与使用存储单元的现有技术的PLL相比,本发明的控制级的配置降低了PLL所需的芯片面积减小。 本发明进一步提出了用于PLL的PVT补偿机制,并实现了在其频率响应中具有较低峰值的PLL,这导致更好的稳定响应。

    DESIGN STRUCTURE FOR AN INDUCTOR-CAPACITOR VOLTAGE-CONTROLLED OSCILLATOR
    49.
    发明申请
    DESIGN STRUCTURE FOR AN INDUCTOR-CAPACITOR VOLTAGE-CONTROLLED OSCILLATOR 有权
    电感电容电压控制振荡器的设计结构

    公开(公告)号:US20140191816A1

    公开(公告)日:2014-07-10

    申请号:US13734364

    申请日:2013-01-04

    Abstract: Embodiments of the present invention provide a design structure and method for compensating for a change in frequency of oscillation (FOO) of an LC-tank VCO that includes a first node; second node; inductor; first capacitive network (FCN) that allows the design structure to obtain a target FOO; compensating capacitive (CCN) network that compensates for a change in the design structure's FOO; second capacitive network (SCN) that allows the design structure to obtain a desired FOO; a filter that supplies a voltage to the SCN and is coupled to the SCN; a transconductor that compensates for a change in the design structure's FOO; and a sub-circuit coupled to the SCN that generates and supplies voltage to the CCN sufficient to allow the CCN to compensate for a reduction in the design structure's FOO. The first and second nodes are coupled to the inductor, FCN, CCN, SCN, and sub-circuit.

    Abstract translation: 本发明的实施例提供了一种用于补偿包括第一节点的LC槽VCO的振荡频率(FOO)变化的设计结构和方法; 第二节点 电感; 第一电容网络(FCN),允许设计结构获得目标FOO; 补偿电容(CCN)网络,补偿设计结构的FOO的变化; 第二电容网络(SCN),其允许设计结构获得期望的FOO; 一个向SCN提供电压并耦合到SCN的滤波器; 一种补偿设计结构FOO变化的跨导体; 以及耦合到SCN的子电路,其产生并向CCN提供足够的电压以允许CCN补偿设计结构的FOO的减少。 第一和第二节点耦合到电感器,FCN,CCN,SCN和子电路。

    PHASE LOCK LOOP, VOLTAGE CONTROLLED OSCILLATOR OF THE PHASE LOCK LOOP, AND METHOD OF OPERATING THE VOLTAGE CONTROLLED OSCILLATOR
    50.
    发明申请
    PHASE LOCK LOOP, VOLTAGE CONTROLLED OSCILLATOR OF THE PHASE LOCK LOOP, AND METHOD OF OPERATING THE VOLTAGE CONTROLLED OSCILLATOR 有权
    相位锁定环路,相位锁定环路的电压控制振荡器和操作电压控制振荡器的方法

    公开(公告)号:US20140184343A1

    公开(公告)日:2014-07-03

    申请号:US13731687

    申请日:2012-12-31

    CPC classification number: H03L1/00 H03B5/10 H03L7/06 H03L7/099 H03L7/0992

    Abstract: A voltage controlled oscillator (VCO) includes a current controlled oscillator, a voltage-to-current converter, and a sensing circuit. The sensing circuit includes a delay unit, and the sensing circuit is configured to generate a plurality of compensation control signals in response to a time delay of the delay unit. The voltage-to-current converter is configured to generate a current signal in response to a VCO control signal and the plurality of compensation control signals. The current controlled oscillator is configured to generate an oscillating signal in response to the current signal.

    Abstract translation: 压控振荡器(VCO)包括电流控制振荡器,电压 - 电流转换器和感测电路。 感测电路包括延迟单元,并且感测电路被配置为响应于延迟单元的时间延迟而产生多个补偿控制信号。 电压 - 电流转换器被配置为响应于VCO控制信号和多个补偿控制信号而产生电流信号。 电流控制振荡器被配置为响应于当前信号产生振荡信号。

Patent Agency Ranking