公开(公告)号：US10886482B2

公开(公告)日：2021-01-05

申请号：US16452946

申请日：2019-06-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuai Zhang ,  Xiaolong Li ,  Yueping Zuo ,  Shantao Chen ,  Qiuhua Meng ,  Ming Liu

IPC: H01L51/00 ,  H01L51/52 ,  H01L27/32 ,  H01L33/12 ,  H01L29/78 ,  C08L63/00 ,  G03F7/00 ,  H05K1/02 ,  B82Y10/00 ,  B82Y40/00

Abstract: A flexible display panel, a manufacturing method thereof and a display device are provided. The flexible display panel includes: a flexible substrate, a first metal layer formed on the substrate, an insulation layer overlying the first metal layer, and a second metal layer disposed on the insulation layer, wherein a plurality of via holes are provided in the insulation layer, the inner wall of each via hole is covered by a stress buffer layer and the second metal layer is formed on the stress buffer layer and connected to the first metal layer through the via holes.

公开(公告)号：US10770595B2

公开(公告)日：2020-09-08

申请号：US16427743

申请日：2019-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xueyan Tian ,  Zunqing Song ,  Xiaolong Li

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/324 ,  H01L27/12

Abstract: A thin film transistor, a method for manufacturing the same and a display device are provided in the present disclosure. The thin film transistor includes an active layer, a first electrode and a second electrode, and a gate electrode. The active layer includes an active layer body and an electrode hole in a center of the active layer body. The gate electrode is insulated and spaced apart from the active layer body and is disposed to surround the electrode hole. The first electrode and the second electrode are insulated from each other, both coupled to the active layer body, and insulated and spaced apart from the gate electrode. At least a portion of an orthographic projection of the first electrode on the active layer is within the electrode hole. An orthographic projection of the second electrode on the active layer surrounds the active layer body.

公开(公告)号：US20200243778A1

公开(公告)日：2020-07-30

申请号：US16605181

申请日：2019-03-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong Li

IPC: H01L51/00 ,  H01L27/32

Abstract: Disclosed are a flexible array substrate, a preparation method thereof, and a flexible display panel. The flexible array substrate comprises a plurality of pixel island regions sequentially arranged, with a flexible region being disposed between adjacent pixel island regions, wherein each of the pixel island regions comprises a gate electrode, and the flexible region comprises a first connecting wire, an elastic layer disposed on the first connecting wire, and a second connecting wire disposed on the elastic layer, wherein a plurality of interlayer via holes are disposed in the elastic layer, an elastic conductive pillar is disposed in each of the interlayer via holes, the elastic conductive pillar is conductively connected to the first connecting wire and the second connecting wire respectively, and the first connecting wire and/or the second connecting wire are/is connected to the gate electrodes of adjacent pixel island regions.

公开(公告)号：US20190335063A1

公开(公告)日：2019-10-31

申请号：US16222000

申请日：2018-12-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Kuanjun Peng ,  Wei Qin ,  Xiaolong Li

IPC: H04N1/60 ,  H04N9/64

Abstract: The present disclosure relates to a color vector conversion method and device suitable for a display device. The method includes determining a three-dimensional vector of a first intersection point according to the three-dimensional vector of the to-be-converted point and a three-dimensional vector of a reference point. The method includes determining a three-dimensional vector of a second intersection point according to the three-dimensional vector of the first intersection point and a three-dimensional vector of a first vertex. The method includes converting the three-dimensional vector of the second intersection point to an N-dimensional vector according to N-dimensional vectors of two endpoints located on the first side. The method includes determining an N-dimensional vector of the first intersection point according to the N-dimensional vector of the second intersection point. The method includes determining an N-dimensional vector of the to-be-converted point according to the N-dimensional vector of the first intersection point.

公开(公告)号：US10297678B2

公开(公告)日：2019-05-21

申请号：US15989773

申请日：2018-05-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong Li ,  Zunqing Song ,  Xiaowei Xu ,  Dong Li

IPC: H01L21/00 ,  H01L21/84 ,  H01L29/66 ,  H01L21/768 ,  H01L21/324 ,  H01L21/265

Abstract: The present disclosure provides a method for manufacturing a thin film transistor comprising, forming a pattern of an active layer on a substrate through a patterning process; performing ion doping to a channel region of the active layer; forming a gate insulating layer; forming a pattern of a gate through the patterning process; performing ion doping to a source contact region and a drain contact region of the active layer; forming an interlayer insulating layer; and performing laser annealing to the active layer, so as to make the active layer crystallize and the ions doped in the channel region, the source contact region and the drain contact region of the active layer activate simultaneously. In this method, the crystallization of the active layer and the activation of the ions doped in the active layer are implemented in the same process, which reduces the process cost and improves the efficiency.

公开(公告)号：US10241339B2

公开(公告)日：2019-03-26

申请号：US15198063

申请日：2016-06-30

Applicant: Boe Technology Group Co., Ltd.

Inventor： Xiaowei Xu ,  Xiaolong Li ,  Liangjian Li

IPC: G02B27/14 ,  G02B27/10 ,  G02B26/02 ,  B23K26/00 ,  B23K26/067 ,  B23K26/0622 ,  H01L21/268 ,  B23K26/06 ,  H01S3/00 ,  B23K103/00 ,  H01S3/10 ,  G02B17/02

Abstract: The present disclosure discloses a laser pulse delay system and a laser annealing system. The laser pulse delay system comprises: a beam splitter, a first reflective unit and a delay unit. The beam splitter is configured to split a laser beam emitted by a laser into a first beam and a second beam, such that the first beam is transmitted to the first reflective unit and the second beam is transmitted to the delay unit. The first reflective unit is configured to reflect the first beam it receives, such that the reflected first beam is transmitted to a component to be irradiated. The delay unit is configured to delay the second beam it receives, such that the delayed second beam is transmitted to the component to be irradiated.

公开(公告)号：US20180374908A1

公开(公告)日：2018-12-27

申请号：US15737191

申请日：2017-06-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong Li ,  Yi Li ,  Xiaowei Xu ,  Zheng Liu

IPC: H01L27/32

CPC classification number: H01L27/326 ,  H01L27/3206 ,  H01L27/3216 ,  H01L27/3218 ,  H01L27/3246 ,  H01L27/3272 ,  H01L51/0011 ,  H01L51/0017 ,  H01L2251/558

Abstract: A display substrate, a method for manufacturing the same, a display panel and a display device are disclosed. The display substrate includes a pixel unit, and the pixel unit includes a light emitting layer and a pixel definition layer surrounding the light emitting layer. The pixel definition layer includes a first region and a second region. The first region has a first thickness, the second region has a second thickness. The first thickness is greater than the second thickness.

公开(公告)号：US20180226256A1

公开(公告)日：2018-08-09

申请号：US15716267

申请日：2017-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Dong Li ,  Xiaolong Li ,  Huijuan Zhang

IPC: H01L21/28 ,  H01L21/3115 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L21/28158 ,  H01L21/02164 ,  H01L21/02323 ,  H01L21/02359 ,  H01L21/31155 ,  H01L29/4908 ,  H01L29/66742

Abstract: Disclosed are a thin film transistor, a method for fabricating the same, and a display device, where the fabricating method includes: forming a gate insulation layer on a base substrate; and injecting negative ions into the gate insulation layer through ion injection, wherein the negative ions can be bonded with positive ions in the gate insulation layer. In the fabricating method according to the application, the negative ions can be injected into the gate insulation layer to thereby lower the concentration of positive charges in the gate insulation layer so as to alleviate the threshold voltage in the thin film transistor from negative bias, and also lower power consumption in driving a pixel circuit.

公开(公告)号：US09985116B2

公开(公告)日：2018-05-29

申请号：US15350844

申请日：2016-11-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong Li ,  Zheng Liu ,  Dong Li ,  Huijuan Zhang ,  Jian Min

IPC: H01L21/00 ,  H01L29/66 ,  H01L21/3065 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66757 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/3065 ,  H01L21/32115 ,  H01L21/32132 ,  H01L29/78675

Abstract: A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0° and less than 90°.

公开(公告)号：US20170133512A1

公开(公告)日：2017-05-11

申请号：US15104504

申请日：2015-07-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng Liu ,  Chunping Long ,  Yu-Cheng Chan ,  Xiaoyong Lu ,  Xiaolong Li

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/265 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/78633 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02667 ,  H01L21/26513 ,  H01L27/1222 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: The disclosure provides a polycrystalline silicon thin-film transistor and a method for manufacturing the same as well as a display device. The polycrystalline silicon thin-film transistor comprises: a substrate; an isolation layer formed on the substrate; and a polycrystalline silicon active layer formed on the substrate and the isolation layer, with two source-drain ion implantation regions being formed at both sides of the active layer, wherein the edges at both ends of the isolation layer are within the edges at both ends of the active layer. In the polycrystalline silicon thin-film transistor and the method for manufacturing the same provided by the disclosure, it is possible to increase the grain size of the active layer, improve the grain uniformity in a channel region thereof, effectively prevent deterioration of characteristics of the active layer caused by backlight irradiation, and improve the reliability of the device.