High density spin-transfer torque MRAM process
    43.
    发明授权
    High density spin-transfer torque MRAM process 有权
    高密度自旋转移力矩MRAM工艺

    公开(公告)号:US08183061B2

    公开(公告)日:2012-05-22

    申请号:US12931648

    申请日:2011-02-07

    CPC classification number: H01L27/228 H01L43/12

    Abstract: A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.

    Abstract translation: 公开了一种STT-MRAM集成方案,其中通过在CMOS着陆焊盘,接触和覆盖VAC的金属(VAM)焊盘上形成中间通孔接触(VAC)来简化MTJ和CMOS金属之间的连接,以及MTJ 在VAM上。 执行双镶嵌工艺,通过设备区域中的VAC / VAM / MTJ堆叠将BIT线金属连接到CMOS着陆焊盘,并通过设备区域外的BIT连接通孔将BIT线连接焊盘连接到CMOS连接焊盘。 VAM焊盘是由Ta,TaN或用作扩散阻挡层的其它导体制成的单层或复合材料,具有用于MTJ形成的高度光滑的表面,并且在化学机械抛光工艺期间提供了与补充介电材料的优异选择性。 每个VAC为500至3000埃厚,以最小化额外的电路电阻并最小化蚀刻负担。

    Method of magnetic tunneling layer processes for spin-transfer torque MRAM
    44.
    发明授权
    Method of magnetic tunneling layer processes for spin-transfer torque MRAM 有权
    旋转转矩MRAM的磁隧道层工艺方法

    公开(公告)号:US08133745B2

    公开(公告)日:2012-03-13

    申请号:US11975045

    申请日:2007-10-17

    CPC classification number: H01L43/12 B82Y10/00 H01L27/228

    Abstract: A method for forming a MTJ in a STT-MRAM is disclosed in which the easy-axis CD is determined independently of the hard-axis CD. One approach involves two photolithography steps and two etch steps to form a post in a hard mask which is transferred through a MTJ stack of layers by a third etch process. Optionally, the third etch may stop on the tunnel barrier or in the free layer. A second embodiment involves forming a first parallel line pattern on a hard mask layer and transferring the line pattern through the MTJ stack with a first etch step. A planar insulation layer is formed adjacent to the sidewalls in the line pattern and then a second parallel line pattern is formed which is transferred by a second etch through the MTJ stack to form a post pattern. Etch end point may be controlled independently for hard-axis and easy-axis dimensions.

    Abstract translation: 公开了一种用于在STT-MRAM中形成MTJ的方法,其中容易轴CD独立于硬轴CD来确定。 一种方法涉及两个光刻步骤和两个蚀刻步骤,以在通过第三蚀刻工艺通过MTJ叠层堆叠的硬掩模中形成柱。 可选地,第三蚀刻可以在隧道势垒上或在自由层中停止。 第二实施例涉及在硬掩模层上形成第一平行线图案,并通过第一蚀刻步骤通过MTJ堆叠传送线图案。 平面绝缘层与线图案中的侧壁相邻地形成,然后形成第二平行线图案,其通过第二次蚀刻通过MTJ叠层转印以形成柱形图案。 蚀刻终点可以独立控制硬轴和易轴尺寸。

    High density spin-transfer torque MRAM process

    公开(公告)号:US20110129946A1

    公开(公告)日:2011-06-02

    申请号:US12931648

    申请日:2011-02-07

    CPC classification number: H01L27/228 H01L43/12

    Abstract: A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.

    Method of double patterning and etching magnetic tunnel junction structures for spin-transfer torque MRAM devices
    46.
    发明申请
    Method of double patterning and etching magnetic tunnel junction structures for spin-transfer torque MRAM devices 有权
    双重图案化和蚀刻用于自旋转移转矩MRAM器件的磁性隧道结结构的方法

    公开(公告)号:US20100240151A1

    公开(公告)日:2010-09-23

    申请号:US12383298

    申请日:2009-03-23

    CPC classification number: H01L27/228 H01L43/12

    Abstract: A method for forming a MTJ in a STT-MRAM is disclosed in which the easy-axis CD is determined independently of the hard-axis CD. One approach involves two photolithography steps each followed by two plasma etch steps to form a post in a hard mask which is transferred through a MTJ stack of layers. The hard mask has an upper Ta layer with a thickness of 300 to 400 Angstroms and a lower NiCr layer less than 50 Angstroms thick. The upper Ta layer is etched with a fluorocarbon etch while lower NiCr layer and underlying MTJ layers are etched with a CH3OH. Preferably, a photoresist mask layer is removed by oxygen plasma between the fluorocarbon and CH3OH plasma etches. A lower hard mask layer made of NiCr or the like is inserted to prevent formation and buildup of Ta etch residues that can cause device shunting.

    Abstract translation: 公开了一种用于在STT-MRAM中形成MTJ的方法,其中容易轴CD独立于硬轴CD来确定。 一种方法涉及两个光刻步骤,每个步骤分别采用两个等离子体蚀刻步骤,以在通过MTJ堆叠层传送的硬掩模中形成柱。 硬掩模具有厚度为300至400埃的上层Ta层和小于50埃厚的较低NiCr层。 用氟碳蚀刻蚀刻上层Ta层,同时用CH3OH蚀刻下层NiCr层和下层MTJ层。 优选地,在碳氟化合物和CH 3 OH等离子蚀刻之间的氧等离子体去除光致抗蚀剂掩模层。 插入由NiCr等制成的下部硬掩模层以防止可能导致器件分流的Ta蚀刻残留物的形成和积累。

    Composite hard mask for the etching of nanometer size magnetic multilayer based device
    48.
    发明申请
    Composite hard mask for the etching of nanometer size magnetic multilayer based device 有权
    复合硬掩模用于蚀刻纳米尺寸磁性多层器件

    公开(公告)号:US20090078927A1

    公开(公告)日:2009-03-26

    申请号:US11901999

    申请日:2007-09-20

    CPC classification number: H01L43/12 Y10T428/24736

    Abstract: A composite hard mask is disclosed that enables sub-100 nm sized MTJ cells to be formed for advanced devices such as spin torque MRAMs. The hard mask has a lower non-magnetic metallic layer such as Ru to magnetically isolate an overlying middle metallic spacer such as MnPt from an underlying free layer. The middle metallic spacer provides a height margin during subsequent processing to avoid shorting between a bit line and the MTJ cell in the final device. An upper conductive layer may be made of Ta and is thin enough to allow a MTJ pattern in a thin overlying photoresist layer to be transferred through the Ta during a fluorocarbon etch without consuming all of the photoresist. The MTJ pattern is transferred through the remaining hard mask layers and underlying MTJ stack of layers with a second etch step using a C, H, and O etch gas composition.

    Abstract translation: 公开了一种复合硬掩模,其能够为高级装置(例如自旋扭矩MRAM)形成次100nm大小的MTJ电池。 硬掩模具有较低的非磁性金属层,例如Ru,以将下层的中间金属间隔物(例如MnPt)与下层的自由层磁隔离。 中间金属间隔件在后续处理期间提供高度余量以避免位线和最终装置中的MTJ单元之间的短路。 上导电层可以由Ta制成,并且足够薄以使氟薄膜蚀刻中的薄覆盖光致抗蚀剂层中的MTJ图案能够通过Ta Ta传输而不消耗所有的光致抗蚀剂。 使用C,H和O蚀刻气体组合物,通过第二蚀刻步骤将MTJ图案转移通过剩余的硬掩模层和下面的MTJ堆叠层。

    Environment exchange control for material on a wafer surface
    50.
    发明授权
    Environment exchange control for material on a wafer surface 有权
    晶圆表面材料的环境交换控制

    公开(公告)号:US06844027B1

    公开(公告)日:2005-01-18

    申请号:US09563775

    申请日:2000-05-02

    CPC classification number: G03F7/70866 G03F7/168 G03F7/26 G03F7/38

    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).

    Abstract translation: 描述了用于晶片表面上的聚合物的环境交换控制的系统和方法。 用于控制位于环境中的晶片表面上的环境和聚合物之间的交换的装置包括:适于保持晶片的腔室,限定环境,并将聚合物保持在与环境相邻的关系中; 以及耦合到所述室的加热器。 提高旋涂材料的性能的方法包括:在晶片的表面上形成旋涂材料; 然后将旋涂材料定位在环境中,使得所述环境与所述旋涂材料相邻; 然后控制旋涂材料和所述环境之间的交换。 系统和方法提供了优点,因为通过仔细控制环境温度和环境物质分压(例如相对湿度)来减轻不适当的脱保护。

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