公开(公告)号：US06475604B1

公开(公告)日：2002-11-05

申请号：US09584768

申请日：2000-06-01

Applicant: Eiji Fujii ,  Atsushi Tomozawa ,  Hideo Torii ,  Ryoichi Takayama

Inventor： Eiji Fujii ,  Atsushi Tomozawa ,  Hideo Torii ,  Ryoichi Takayama

IPC: H01C700

CPC classification number: H01C17/12 ,  H01C7/023 ,  Y10T428/24917

Abstract: A thin film thermistor element 10 is formed by forming on a backing substrate 11 of alumina a thermistor thin film 12 and a pair of comb electrodes 13 and 14 formed of a thin film of Pt. The thermistor thin film 12, which is formed of, for example, complex oxide of Mn—Co—Ni, has either a spinel type crystal structure which is priority oriented or oriented mainly in a (100) surface or a bixbite type crystal structure which is priority oriented in a (100) or (111) surface. Alternatively, the thermistor thin film is formed of LaCoO3 and has a rhombohedral bixbite type crystal structure. This makes it possible to hold the variation in resistance value low thereby to achieve high accuracy, and the deterioration with time can be held low and the high temperature durability can be improved, for the achievement of high reliability.

Abstract translation: 通过在氧化铝的背衬基板11上形成热敏电阻薄膜12和由Pt的薄膜形成的一对梳状电极13和14来形成薄膜热敏电阻元件10。 由例如Mn-Co-Ni的复合氧化物形成的热敏电阻薄膜12具有尖晶石型晶体结构，其优先取向或主要在（100）表面取向或双键型晶体结构中，其中， 在（100）或（111）表面优先考虑。 或者，热敏电阻薄膜由LaCoO 3形成，并且具有菱形双峰型晶体结构。 这使得可以将电阻值的变化保持为低，从而实现高精度，并且，为了实现高可靠性，能够将劣化随时间变低，提高耐高温性。

公开(公告)号：US06462643B1

公开(公告)日：2002-10-08

申请号：US09250731

申请日：1999-02-16

Applicant: Eiji Fujii ,  Hideo Torii ,  Atsushi Tomozawa

Inventor： Eiji Fujii ,  Hideo Torii ,  Atsushi Tomozawa

IPC: H01C710

CPC classification number: H01C7/025 ,  H01C17/12

Abstract: The present invention provides a PTC thermistor element low in electric resistance at room temperature and suitable for monolithic incorporation with an integrated circuit. According to the present invention, the PTC thermistor film is subjected to rapid heating by heat irradiation in the annealing step. An n-type semiconductor is interposed between the electrodes and the PTC thermistor film, and a PTC thermistor film is also interposed between the n-type semiconductor and the electrode. Further, a plurality of such thermistor elements are parallel-connected to each other, and at least one of them is connected opposite to the other elements.

Abstract translation: 本发明提供一种在室温下电阻较低的PTC热敏电阻元件，适用于集成电路的整体结合。 根据本发明，通过退火步骤中的热照射使PTC热敏电阻膜快速加热。 在电极和PTC热敏电阻膜之间插入n型半导体，并且在n型半导体和电极之间也插入PTC热敏电阻膜。 此外，多个这样的热敏电阻元件彼此并联连接，并且它们中的至少一个与其它元件相对地连接。

公开(公告)号：US06081182A

公开(公告)日：2000-06-27

申请号：US970496

申请日：1997-11-14

Applicant: Atsushi Tomozawa ,  Eiji Fujii ,  Hideo Torii ,  Ryoichi Takayama

Inventor： Atsushi Tomozawa ,  Eiji Fujii ,  Hideo Torii ,  Ryoichi Takayama

IPC: G01K7/22 ,  H01C7/04 ,  H01C17/30 ,  H01L7/02

CPC classification number: G01K7/223 ,  H01C17/30 ,  H01C7/041 ,  H01C7/043

Abstract: The present invention provides a temperature sensor element having excellent heat resistance, quick heat response, stable resistance, and high reliability with a less variation in resistance against time. The temperature sensor element includes a thermo-sensitive film mainly composed of a heat sensitive material having electrical resistance varies depending on the temperature; a pair of electrode films arranged to measure the electrical resistance in the direction of the thickness of the thermo-sensitive film, a base plate mainly composed of a heat-resistant insulating material for supporting the thermo-sensitive film and the electrode films, an anti-diffusion film interposed between the thermo-sensitive film and the electrode film in the vicinity of the base plate, and a film mainly composed of a heat-resistant insulating material for covering the thermo-sensitive film and the electrode films except the lead-connecting terminals of the electrode films. The thermo-sensitive film is composed of an oxide of corundum crystalline structure represented by the formula of (Al.sub.1-x-y Cr.sub.x Fe.sub.y).sub.2 O.sub.3, where 0.05.ltoreq.x+y.ltoreq.0.95, and 0.ltoreq.y/(x+y).ltoreq.0.6, and the anti-diffusion film is composed of an oxide of corundum crystalline structure represented by the formula of (Al.sub.1-x-y Cr.sub.x Fe.sub.y).sub.2 O.sub.3, where 0.ltoreq.x+y.ltoreq.0.95.

Abstract translation: 本发明提供了一种具有优异的耐热性，快速热响应性，稳定的电阻和高可靠性的温度传感器元件，其耐时间变化较小。 温度传感器元件包括主要由具有根据温度而变化的电阻的热敏材料组成的热敏膜; 布置成测量热敏膜厚度方向上的电阻的一对电极膜，主要由用于支撑热敏膜的耐热绝缘材料和电极膜组成的基板，抗 介于热敏膜与基板附近的电极膜之间的扩散膜，以及主要由用于覆盖热敏膜的耐热绝缘材料和除引线连接之外的电极膜构成的膜 电极膜的端子。 热敏膜由（Al1-x-yCrxFey）2O3表示的刚玉结晶结构的氧化物组成，其中0.05

公开(公告)号：US6080617A

公开(公告)日：2000-06-27

申请号：US950920

申请日：1997-10-15

Applicant: Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

Inventor： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92

CPC classification number: H01L27/11502 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/55

Abstract: A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.

Abstract translation: 一种包括集成电路和电容器的半导体器件。 在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接 用于保护电容器的表面。 在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

公开(公告)号：US6046490A

公开(公告)日：2000-04-04

申请号：US132023

申请日：1998-08-10

Applicant: Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

Inventor： Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC: H01L21/02 ,  H01L21/768 ,  H01L29/40

CPC classification number: H01L28/55 ,  H01L21/76895

Abstract: A semiconductor device is provided with a multilayered interconnection and a capacitor dielectric element, in which the transistor in the device has a non-degraded characteristics and the degradation of the capacitor dielectric element is suppressed. The semiconductor device has wiring layers connecting to one another through contact holes in insulating layers. One of the insulating layers is formed so as to cover at least a part of the area above the transistor and so as not to cover the area above the capacitor dielectric element. Hydrogen generated by heat-treating the insulating layer is supplied to the transistor to recover the damage in it, while hydrogen is suppressed from arriving at the capacitor element so that the capacitor dielectric element does not degrade.

Abstract translation: 半导体器件设置有多层互连和电容器介质元件，其中器件中的晶体管具有非劣化特性，并且抑制了电容器介质元件的劣化。 半导体器件具有通过绝缘层中的接触孔彼此连接的布线层。 绝缘层之一形成为覆盖晶体管上方的区域的至少一部分，并且不覆盖电容器介质元件上方的区域。 通过热处理绝缘层产生的氢气被提供给晶体管以恢复其中的损坏，同时抑制氢气到达电容器元件，使得电容器介质元件不劣化。

公开(公告)号：US6046467A

公开(公告)日：2000-04-04

申请号：US667196

申请日：1996-06-20

Applicant: Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

Inventor： Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/92 ,  H01L29/76

CPC classification number: H01L28/40

Abstract: A capacitor 25 is formed on an insulating layer 21a formed on a semiconductor substrate 21. The end portion of a capacitor insulating layer 23 is positioned between the end portion of a bottom electrode 22 and the end portion of a top electrode 24. A passivation layer 26 for covering the capacitor 25 is formed. Interconnections 28 are connected to the bottom electrode 22 through a first hole 27a and to the top electrode 24 through a second hole 27b. In this way, since the end portion of the capacitor insulating layer 23 is out of the end portion of the top electrode 24, the end portion of the capacitor insulating layer 23 injured by etching does not affect the capacitance.

Abstract translation: 电容器25形成在形成在半导体衬底21上的绝缘层21a上。电容器绝缘层23的端部位于底部电极22的端部和顶部电极24的端部之间。钝化层 形成用于覆盖电容器25的26。 互连件28通过第一孔27a连接到底部电极22，并通过第二孔27b连接到顶部电极24。 以这种方式，由于电容器绝缘层23的端部不在顶部电极24的端部之外，所以通过蚀刻损伤的电容器绝缘层23的端部不影响电容。

公开(公告)号：US6044795A

公开(公告)日：2000-04-04

申请号：US107345

申请日：1998-06-30

Applicant: Taketoshi Matsuura ,  Eiji Fujii ,  Kazuhiro Mori

Inventor： Taketoshi Matsuura ,  Eiji Fujii ,  Kazuhiro Mori

IPC: A01K5/02 ,  A01K11/00 ,  H04B1/034 ,  A01K1/10 ,  A01K5/00 ,  A01K39/00 ,  H04B1/02

CPC classification number: H04B1/0343 ,  A01K5/02 ,  A01K5/0275

Abstract: An automatic feeding system includes a tag attached to a body of a pet; and an automatic feeding apparatus for automatically feeding the pet. The tag includes a receiving device for receiving an electromagnetic wave from the automatic feeding apparatus; an information memory device storing information on the feeding of the pet and outputting the information in response to an output from the receiving device; and a sending device for sending the information which is output from the information memory device to the automatic feeding apparatus using an electric wave. The automatic feeding apparatus includes a receiving device for receiving the electric wave from the tag; an information reading device for reading the information on the feeding of the pet in response to an output from the receiving device of the automatic feeding apparatus; a feeding device for supplying feed based on the information; and a sending device for sending an instruction to read the information on the feeding of the pet to the tag using an electric wave.

Abstract translation: 一种自动进给系统，包括附着在宠物身上的标签; 以及用于自动进给宠物的自动进给装置。 标签包括用于从自动进给装置接收电磁波的接收装置; 信息存储装置，其存储关于宠物的馈送的信息并且响应于来自接收装置的输出而输出信息; 以及发送装置，用于使用电波将从信息存储装置输出的信息发送到自动馈送装置。 自动进给装置包括用于从标签接收电波的接收装置; 信息读取装置，用于响应于自动进给装置的接收装置的输出读取关于宠物的馈送的信息; 用于基于所述信息供给饲料的饲养装置; 以及发送装置，用于发送用于使用电波读取关于宠物向标签馈送的信息的指令。

公开(公告)号：US5943568A

公开(公告)日：1999-08-24

申请号：US811664

申请日：1997-03-05

Applicant: Eiji Fujii ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Akihiro Matsuda

Inventor： Eiji Fujii ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Akihiro Matsuda

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/324 ,  H01L21/768 ,  H01L21/822 ,  H01L27/10 ,  H01L21/8242

CPC classification number: H01L28/40 ,  H01L21/3105 ,  H01L21/76828

Abstract: A method of making a semiconductor device include forming: (a) a semiconductor substrate on whose surface an integrated circuit is formed, (b) a first insulating layer on the semiconductor device and having first contact holes which lead to the integrated circuit, (c) a capacitance element on the first insulating layer, (d) a second insulating layer on the first insulating layer to cover the capacitance element, and having second contact holes which lead to an upper and a lower electrodes of the capacitance element respectively, and (e) interconnections which are connected to the integrated circuit and the capacitance element respectively through the first and second contact holes. The hydrogen density of this semiconductor device is 10.sup.11 atoms/cm.sup.2 or less.

Abstract translation: 制造半导体器件的方法包括形成：（a）其表面上形成有集成电路的半导体衬底，（b）半导体器件上的第一绝缘层，并且具有通向集成电路的第一接触孔，（c ）所述第一绝缘层上的电容元件，（d）所述第一绝缘层上的第二绝缘层以覆盖所述电容元件，并且具有分别通向所述电容元件的上下电极的第二接触孔，和 e）分别通过第一和第二接触孔连接到集成电路和电容元件的互连。 该半导体器件的氢密度为1011原子/ cm 2以下。

公开(公告)号：US5795794A

公开(公告)日：1998-08-18

申请号：US678291

申请日：1996-07-11

Applicant: Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

Inventor： Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC classification number: H01L28/55

Abstract: The present invention relates to method of manufacturing semiconductor devices having built-in capacitor comprising a dielectric substance of high dielectric constant or a ferroelectric substance as the capacitance insulation film, and aims to solve a problem that the prior art capacitance insulation film contained in semiconductor devices has a rough surface which results in a poor insulating voltage and a large spread in electrical characteristics, as well as broken connection wire; in which method a capacitance insulation film is produced by first forming a first dielectric film, and forming a second dielectric film on the first dielectric film for a thickness greater than the difference in level between top and bottom of the surface of first dielectric film, and forming a thin film whose etching speed is identical with that of the second dielectric film on the second dielectric film making the surface of thin film flat, and then etching the whole of the thin film and part of the second dielectric film off simultaneously to make the surface of second dielectric film flat.

Abstract translation: 本发明涉及具有内置电容器的半导体器件的制造方法，该半导体器件包括具有高介电常数的电介质或铁电物质作为电容绝缘膜，并且旨在解决包含在半导体器件中的现有技术的电容绝缘膜的问题 具有粗糙的表面，导致绝缘电压差，电特性扩大，连接线断裂; 在该方法中，通过首先形成第一电介质膜来制造电容绝缘膜，并且在第一电介质膜上形成厚度大于第一电介质膜的表面的顶部和底部之间的电平差的厚度的第二电介质膜，以及 形成薄膜，其蚀刻速度与第二电介质膜的蚀刻速度相同，使得薄膜表面平坦化，然后同时蚀刻整个薄膜和部分第二电介质膜，使得 第二电介质膜的表面平坦。

公开(公告)号：US5717157A

公开(公告)日：1998-02-10

申请号：US351216

申请日：1994-11-30

Applicant: Atsushi Tomozawa ,  Satoru Fujii ,  Eiji Fujii ,  Ryoichi Takayama ,  Masafumi Kobune ,  Satoshi Fujii

Inventor： Atsushi Tomozawa ,  Satoru Fujii ,  Eiji Fujii ,  Ryoichi Takayama ,  Masafumi Kobune ,  Satoshi Fujii

IPC: C04B35/472 ,  C23C14/08 ,  C23C14/34 ,  C30B23/02 ,  H01L37/02 ,  H01L41/316 ,  H01L35/22 ,  C04B35/491

CPC classification number: H01L41/316 ,  C04B35/472 ,  C23C14/08 ,  C23C14/3414 ,  C30B23/02 ,  C30B29/32 ,  H01L37/025

Abstract: A ferroelectric thin film includes lead titanate including La and at least an element which forms a six-coordinate bond with oxygen atoms and which is selected from the group consisting of Mg and Mn. The ferroelectric thin film is imparted with a high c-axis orientation while the film is formed without a polarization process. The ferroelectric thin film is manufactured by the steps of: positioning a MgO single crystal substrate disposed in advance with a foundation platinum electrode by a sputtering method on the surface of a substrate heater, exhausting a chamber, heating the substrate by a substrate heater, letting in sputtering gases Ar and O.sub.2 through a nozzle into the chamber, and maintaining a high degree of vacuum. Then, high frequency electric power is input to a target from a high frequency electric power source to generate plasma, and a film is formed on the substrate. In this way, a ferroelectric thin film containing, for example, �(1-x).multidot.Pb.sub.1-y La.sub.y Ti.sub.1-y/4 O.sub.3 +x.multidot.MgO!, where x=0.01.about.0.10 and y=0.05.about.0.25 can be manufactured.

Abstract translation: 铁电薄膜包括包含La的钛酸铅和至少与氧原子形成六配位键的元素，并且选自Mg和Mn。 铁电薄膜在没有极化过程的情况下形成膜时赋予高c轴取向。 铁电薄膜通过以下步骤制造：通过溅射法将预先设置有基底铂电极的MgO单晶基板定位在基板加热器的表面上，排出室，通过基板加热器加热基板，使 在通过喷嘴将气体Ar和O2溅射到室中，并保持高度的真空度。 然后，将高频电力从高频电源输入到目标物，产生等离子体，在基板上形成膜。 以这种方式，可以制造含有例如[（1-x）xPb1-yLayTi1-y / 4O3 + xxMgO]的铁电薄膜，其中x = 0.01DIFFERENCE 0.10和y = 0.05DIFFERENCE 0.25。