LIQUID CRYSTAL DISPLAY DEVICE
    36.
    发明申请

    公开(公告)号:US20170329185A1

    公开(公告)日:2017-11-16

    申请号:US15531382

    申请日:2015-11-24

    Abstract: The present invention provides a liquid crystal display device in which display unevenness is suppressed by preventing degradation of TFT characteristics due to photo-alignment treatment. A liquid crystal display device of the present invention includes: a thin film transistor substrate; and a liquid crystal layer. The thin film transistor substrate includes a thin film transistor having an etching stopper structure, an alignment film, and a pair of electrodes for applying an electric field to the liquid crystal layer. The thin film transistor includes a gate electrode, a gate insulating film, a channel layer containing an oxide semiconductor, an etching stopper layer, and a pair of a source electrode and a drain electrode in the stated order. The alignment film includes a photofunctional group. The liquid crystal layer has negative dielectric anisotropy.

    ELECTRONIC DEVICES
    39.
    发明申请

    公开(公告)号:US20170278945A1

    公开(公告)日:2017-09-28

    申请号:US15345360

    申请日:2016-11-07

    Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.

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