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31.
公开(公告)号:US20230213594A1
公开(公告)日:2023-07-06
申请号:US18091065
申请日:2022-12-29
Applicant: SEWON ELECTRONICS CO., LTD.
Inventor: Pengtao JIANG
Abstract: Disclosed is a device for checking withstand voltage of a connector-coupled cable. The device comprises: a pair of electrode boxes; and a control block configured to apply a start signal to a test instrument, which outputs a preset high voltage, according to an electrical state detected in each electrode box that includes: a housing whose a part of a front side is open; a conductive electrode plate mounted on an inner front side of the housing in such a way that it is rotatable around its top end; and a detection unit, mounted inside the housing with a predetermined gap from the electrode plate, to detect whether the electrode plate is rotated due to push on a lower part of the electrode plate. The electrical state is an electrical state between both terminals of the detection unit, and the preset high voltage is applied between both electrode plates.
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公开(公告)号:US11662380B2
公开(公告)日:2023-05-30
申请号:US17320165
申请日:2021-05-13
Applicant: Apple Inc.
Inventor: Fabien S. Faure , Arnaud J. Forestier , Vikram Mehta
IPC: G01R31/3177 , G01R31/317 , G01R31/3185 , G01R31/319 , G01R31/28 , G01R31/66
CPC classification number: G01R31/3177 , G01R31/31713 , G01R31/31725 , G01R31/2889 , G01R31/31712 , G01R31/31715 , G01R31/31716 , G01R31/31723 , G01R31/31926 , G01R31/318572 , G01R31/66
Abstract: A system includes a first integrated circuit including a first interface circuit with a first transmit pin and a first receive pin, and a first test circuit. The system also includes a second integrated circuit including a second interface circuit with a second receive pin coupled to the first transmit pin, and a second transmit pin coupled to the first receive pin. The second integrated circuit further includes a second test circuit configured to route signals from the second receive pin to the second transmit pin, such that the sent test signal is received by the second receive pin, bypasses the second test circuit, and is routed to the second transmit pin. The first test circuit is further configured to receive the routed test signal on the first receive pin via the second conductive path.
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公开(公告)号:US12113476B2
公开(公告)日:2024-10-08
申请号:US16501400
申请日:2017-10-10
Applicant: Kent Kernahan
Inventor: Kent Kernahan
Abstract: A system comprising an array of solar panels, each panel including an electronic control module, wherein the panels are all connected in electrical series with each other and to a switch and to a string inverter, may be signaled to power down each panel to a safe output at its output terminals. The method includes sensing output wave forms of a module to be the result of its own DC-DC converter output or to be at variance with the expected output. Output wave forms at variance indicate that the control module is connected in electrical series with the input capacitance of the string inverter. If the output is as expected, the control module is deemed to not be connected to the capacitance of the string inverter as a result of the electrical series switch being open. The module then immediately drives its output to a safe level.
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34.
公开(公告)号:US12099098B2
公开(公告)日:2024-09-24
申请号:US18094531
申请日:2023-01-09
Applicant: Shinry Technologies Co., Ltd.
Inventor: Lijun Chen , Renhua Wu
CPC classification number: G01R31/66 , G01R19/0038 , G01R31/006
Abstract: A detection circuit for the on-board direct current/direct current (DC/DC) ground wire and an on-board device are provided. The circuit includes a digital signal process (DSP) controller, a detection circuit, a standby circuit for an on-board DC/DC converter, and a power-supply negative wire for the on-board DC/DC converter. The detection circuit includes a comparator, a first conductive branch, a second conductive branch, a third conductive branch. In this way, the detection circuit is connected between the DSP controller and the standby circuit for the on-board DC/DC converter, and the detection circuit is connected between the DSP controller and the power-supply negative wire for the on-board DC/DC converter.
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公开(公告)号:US12066503B2
公开(公告)日:2024-08-20
申请号:US17256909
申请日:2020-02-04
Applicant: LG CHEM, LTD.
Inventor: Ji Soo Park , Choon Kwon Kang
IPC: G01R31/66 , G01R19/165 , H01M50/204 , H01M50/213 , H01M50/50 , H01M50/503 , H01M50/505 , H01M50/566 , H01M50/569 , B23K101/38
CPC classification number: G01R31/66 , G01R19/16542 , H01M50/204 , H01M50/213 , H01M50/50 , H01M50/503 , H01M50/505 , H01M50/566 , H01M50/569 , B23K2101/38
Abstract: The present disclosure relates to a busbar for connecting battery cells, a battery pack, and a method for manufacturing the battery pack, and more particularly, to a busbar for electrically connecting a plurality of battery cells, a battery pack and a method for manufacturing the battery pack. In accordance with an exemplary embodiment, a battery pack includes: a plurality of battery cells; and a busbar for electrically connecting the plurality of battery cells, wherein the busbar includes: a lead part extending onto each of electrode terminals of the battery cells; a first welding protrusion formed on the lead part and joined to each of the electrode terminals; and a second welding protrusion formed on the lead part and disposed to be spaced apart from each of the electrode terminals.
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公开(公告)号:US20240264214A1
公开(公告)日:2024-08-08
申请号:US18134595
申请日:2023-04-14
Applicant: SCHNEIDER ELECTRIC IT CORPORATION
Inventor: Shiva Prasad Ellendula , SoundaraMohan Ponnusamy , Pradeep Tolakanahalli Nagabhushanrao , Mahendrakumar Haribhau Lipare
CPC classification number: G01R31/086 , G01R31/66
Abstract: A power conditioner includes an input configured to be coupled to a main-power source and an output configured to receive power from within the power conditioner from the main-power source, a backup-power source, or both. The power conditioner includes an inverter, at least one processor, and a memory storing instructions that, when executed by the processor, cause the processor to perform a method. The method includes receiving an inverter-off signal, receiving an output-voltage level above a threshold output-voltage level, and preventing activation of the inverter in response to at least receiving the inverter-off signal and the output-voltage level above the threshold output-voltage level.
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公开(公告)号:US12038457B2
公开(公告)日:2024-07-16
申请号:US17506745
申请日:2021-10-21
Applicant: Keysight Technologies, Inc.
Inventor: Tie Qiu , Andrew Tek , Shaoying Huang , Manish Prajapati
CPC classification number: G01R1/07 , G01R31/086 , G01R31/66
Abstract: A sensor device for testing electrical connections using contactless fault detection is disclosed. The sensor device includes: a surface coil comprising a plurality of concentric loops disposed at a first region located away from the electrical connections. The concentric loops generate a first magnetic field passing through the electrical connections, and the first magnetic field is equivalent to that generated by a coaxial intermediate current loop adjacent to the electrical connections based on an excitation current in the surface coil. The sensor device further includes a sensor adapted to detect a second magnetic field at a second region located away from the electrical connections, wherein variations in the detected second magnetic field provide categories of performance of the electrical connections.
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公开(公告)号:US20240175942A1
公开(公告)日:2024-05-30
申请号:US18511536
申请日:2023-11-16
Applicant: FERRARI S.P.A.
Inventor: Giuseppe AGNELLO , Roberto BETRO' , Giovanni LO CALZO , Ugo SITTA , Luca POGGIO
CPC classification number: G01R31/66 , G07C5/0816
Abstract: The ageing of an electrical connection installed in a vehicle is evaluated by performing a series of samplings, spaced apart from one another at predefined time intervals, so as to determine a working temperature of the electrical connection for each sampling interval, and by determining a maximum duration of the electrical connection, assuming that the electrical connection was subjected, for its entire life, to the corresponding previously determined working temperature; then, an accumulated damage of the electrical connection is calculated, by overlapping a plurality of partial damage contributions, each of which is determined for each sampling interval, by dividing this sampling time interval by the corresponding maximum duration; finally, the accumulated damage is evaluated so as to identify any criticalities.
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39.
公开(公告)号:US20240110997A1
公开(公告)日:2024-04-04
申请号:US18001706
申请日:2022-08-04
Applicant: STATE GRID JIANGSU ELECTRIC POWER CO., LTD. RESEARCH INSTITUTE , STATE GRID JIANGSU ELECTRIC POWER CO., LTD. , JIANGSU ELECTRIC POWER RESEARCH INSTITUTE CO., LTD.
Inventor: Jingying CAO , Qiang HUANG , Jinggang YANG , Jie CHEN , Rong SUN , Jianjun LIU , Xiao TAN , Libin HU , Chenying LI , Wei ZHANG
Abstract: Disclosed are a device and method for detecting defects of a high-voltage cable cross-bonded grounding system. The method comprises: selecting a protective grounding box of a cross-bonded grounding system, respectively connecting a signal excitation coupler to A-phase, B-phase and C-phase coaxial cables of the protective grounding box, selecting a stable signal with a frequency different from a power frequency or a field interference frequency, and testing effective current values and phases responded by the A-phase, B-phase and C-phase coaxial cables when the stable signal with the frequency F1 is injected into the A-phase, B-phase and C-phase coaxial cables of the protective grounding box in a coupled manner; and obtaining resistances and inductances of branch circuits of the cable cross-bonded grounding system by calculation according to measurement data, and determining if the cable cross-bonded grounding system has a connection defect.
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公开(公告)号:US11899076B2
公开(公告)日:2024-02-13
申请号:US17414118
申请日:2019-12-19
Applicant: Continental Automotive France , Continental Automotive GmbH
Inventor: Yannick Leroy , Jacques Rocher
Abstract: A computer including a hardware interface wherein the hardware interface includes a first resistor with a first first resistor pin and a second first resistor pin, a second resistor with a first second resistor pin and a second second resistor pin, a transistor, a comparator; the first first resistor pin being coupled on the one hand to the first hardware interface pin and on the other hand to a first transistor pin.
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