Polymorphic Circuit Simulation System
    1.
    发明申请
    Polymorphic Circuit Simulation System 有权
    多形电路仿真系统

    公开(公告)号:US20160125109A1

    公开(公告)日:2016-05-05

    申请号:US14531598

    申请日:2014-11-03

    IPC分类号: G06F17/50

    摘要: A method for operating a data processing system to simulate a circuit that includes a plurality of circuit devices connected by interconnects. A layout description of the circuit is provided in which the devices are connected by interconnects. Each interconnect is associated with a line definition that includes a physical description of an interconnect between two of the circuit devices and a simulation model to be used in simulating the interconnect during simulations of the circuit. The line definitions are user selectable from a list of available line definitions. A circuit netlist is generated by reading physical interconnects from the layout. At least one of the interconnects is replaced by a plurality of transmission line devices, each device being associated with the simulation model included in the line definition. The circuit is then simulated using the netlist.

    摘要翻译: 一种用于操作数据处理系统以模拟包括通过互连连接的多个电路装置的电路的方法。 提供了电路的布局描述,其中设备通过互连连接。 每个互连与线路定义相关联,线路定义包括两个电路设备之间的互连的物理描述以及用于在电路仿真期间模拟互连的仿真模型。 线路定义可以从可用线路定义的列表中进行用户选择。 通过从布局读取物理互连产生电路网表。 至少一个互连由多个传输线设备替代,每个设备与线路定义中包括的仿真模型相关联。 然后使用网表模拟电路。

    Method for estimating radiative contamination at nodes of an RF circuit

    公开(公告)号:US11101905B1

    公开(公告)日:2021-08-24

    申请号:US16923974

    申请日:2020-07-08

    摘要: A method for operating a data processing system to generate an estimate of radiative contamination at nodes in an RF circuit characterized by a plurality of circuit elements connected by metal traces on a circuit board are disclosed. The data processing system to receive information specifying a coupled radiation matrix based on the metal traces and a simulation of an RF circuit with the components connected by non-radiating nodes. The data processing system generates a coupled power list for at least one node of the model, each entry in the coupled power list includes a coupled power value indicating a power level received by EM radiation from another of the nodes.

    System for Discovering the Capabilities of Instruments Connected to a Data Processing System
    3.
    发明申请
    System for Discovering the Capabilities of Instruments Connected to a Data Processing System 审中-公开
    发现连接到数据处理系统的仪器功能的系统

    公开(公告)号:US20160253620A1

    公开(公告)日:2016-09-01

    申请号:US14634673

    申请日:2015-02-27

    IPC分类号: G06Q10/08 G06F17/30

    CPC分类号: G06Q10/087

    摘要: A method for operating a data processing system to discover the attributes of instruments in a set of instruments connected thereto is disclosed. The method causes the data processing system to determine all instruments in the set of instruments connected thereto by sending a first query on each communication link connected to the data processing system. The data processing system receives a response that identifies one of the instruments and a model identification code for that instrument. The data processing system retrieves model configuration information from an instrument catalog database attached to the data processing system based on the manufacturer's catalog information. The model configuration information includes an option that is available on the one of the instruments having the manufacturer's catalog information and a query that will cause that instrument to provide information on whether that option is installed on the one of the instruments.

    摘要翻译: 公开了一种用于操作数据处理系统以发现与其连接的一组仪器中的仪器属性的方法。 该方法使得数据处理系统通过在连接到数据处理系统的每个通信链路上发送第一查询来确定与其相连的一组仪器中的所有仪器。 数据处理系统接收到识别仪器之一的响应和该仪器的型号识别码。 数据处理系统根据制造商的目录信息从连接到数据处理系统的仪器目录数据库中检索模型配置信息。 模型配置信息包括在具有制造商的目录信息的一个仪器上可用的选项,以及将导致该仪器提供关于是否在该仪器上安装该选项的信息的查询的选项。

    VARIABLE GAIN HORN
    4.
    发明公开
    VARIABLE GAIN HORN 审中-公开

    公开(公告)号:US20240332809A1

    公开(公告)日:2024-10-03

    申请号:US18136424

    申请日:2023-04-19

    IPC分类号: H01Q13/02 H01Q1/22 H01Q3/26

    CPC分类号: H01Q13/025 H01Q1/22 H01Q3/267

    摘要: A variable gain horn and a system for testing an antenna with the variable gain horn is disclosed. The variable gain horn includes a horn adapted to transmit electromagnetic signals to an antenna under test. The horn is adapted to have a diverging lens attached and detached without fasteners at its distal end of the horn by a form fit. When the diverging lens is not attached, the variable gain horn transmit the electromagnetic signals at a higher directivity than when the variable gain horn with the diverging lens attached to the distal end. The system also comprises a parabolic mirror adapted to reflect the electromagnetic signals incident thereon from the variable gain horn to an antenna under test (AUT).

    Waveform creation for RF distortion analysis and gain compression characterization

    公开(公告)号:US12095600B1

    公开(公告)日:2024-09-17

    申请号:US17971317

    申请日:2022-10-21

    发明人: Mark Hanni

    IPC分类号: H04L27/00 H04L27/36

    CPC分类号: H04L27/0012 H04L27/36

    摘要: A system includes a memory that stores instructions; and a processor. When executed by the processor, the instructions cause the system to: obtain inputs including a number of steps, a size of the steps, a duration of the steps, and a waveform sample rate; reconcile the duration of the steps against the waveform sample rate to ensure a number of samples per step is an integer number; compute a list of power levels based on the number of steps and the size of the steps; convert the list of power levels to a list of voltage levels; create a first array for I data based on the voltage levels; create a second array for Q data so that a length of the first array matches a length of the second array; and combine the first array and the second array to create an IQ baseband waveform data array.

    EMULATION OF SPATIALLY DISTRIBUTED OBJECTS WITH A SPARSELY POPULATED ARRAY OF RADAR TARGET SIMULATORS

    公开(公告)号:US20240288545A1

    公开(公告)日:2024-08-29

    申请号:US18113848

    申请日:2023-02-24

    IPC分类号: G01S7/40

    摘要: A system for receiving a radar signal transmitted by a radar device under test (DUT) includes: a plurality of antennae disposed in an array of rows and columns; a plurality of radar target simulators (RTS's), one or more of the plurality of RTS's being selectively connected to each of rows or columns of the plurality of antennae. The plurality of antennae are adapted to receive signals selectively from the one or more RTS's connected to the column or row, and to transmit to the signals to the DUT. The system also includes a switching matrix adapted to selectively switch between selected antennae in each of the columns or each of the rows of the plurality of antennae to connect selected respective RTS's of the plurality of RTS's to selected active antennae of the plurality of antennae in a time division manner.

    Methods, devices, and systems for coherent time-gated residual spur characterization and correction in signal analyzers

    公开(公告)号:US12072361B2

    公开(公告)日:2024-08-27

    申请号:US17197182

    申请日:2021-03-10

    摘要: Methods, devices, and systems for coherent time-gated residual spur characterization and correction in signal analyzers. In some cases, the method includes: displaying a signal on the display of the signal analyzer that is present without an input signal being provided to an input of the signal analyzer; establishing a predetermined amplitude threshold above which energy spikes in the signal being displayed on the display of the signal analyzer are considered spurious; automatically identifying one or more spurious energy spikes in the signal being displayed on the display of the signal analyzer based on the predetermined amplitude threshold; and automatically reducing or removing the one or more spurious energy spikes from the signal being displayed on the display of the signal analyzer. The method can be performed using one or more processors, application specific integrated circuits (ASICs), field-programmable gate array (FPGA), or other circuitry on any suitable signal analyzer.

    METHODS, SYSTEMS AND COMPUTER READABLE MEDIA FOR GENERATING DYNAMIC TIME ERROR

    公开(公告)号:US20240267196A1

    公开(公告)日:2024-08-08

    申请号:US18105231

    申请日:2023-02-02

    IPC分类号: H04L7/00

    CPC分类号: H04L7/0016 H04L7/0062

    摘要: The subject matter described herein includes methods, systems, and computer readable media for generating DTE. One method for generating DTE includes at a test device for testing a timing device: configuring, using configuration information, a timestamp impairment engine for generating DTE values for transmit timestamps, wherein the timestamp impairment engine utilizes a sine wave based formula to generate the DTE values; generating a packet comprising an impaired transmit timestamp, wherein the impaired transmit timestamp is generated using a non-impaired timestamp and a DTE value generated by the timestamp impairment engine; and sending the packet to the timing device.

    METHOD AND SYSTEM FOR TESTING DEVICE UNDER TEST (DUT) OVER LONG DISTANCE

    公开(公告)号:US20240259114A1

    公开(公告)日:2024-08-01

    申请号:US18101997

    申请日:2023-01-26

    IPC分类号: H04B17/00 H03L7/099

    CPC分类号: H04B17/0085 H03L7/099

    摘要: A method and system synchronize first and second VNAs for testing a DUT over a long distance. The method includes receiving at the second VNA an RF signal from the first VNA; mixing the RF signal and an LO signal at the second VNA to output an IF signal to an ADC; determining a reference error ratio between a first reference clock in the first VNA and a second reference clock in the second VNA; adjusting an LO frequency to a corrected LO frequency by applying the reference error to a desired LO frequency; mixing the RF signal and the adjusted LO signal to output the IF signal; and resampling the IF signal at an adjusted sample rate to output a corrected IF signal corrected for the reference error, without adjustments being made to the first or second reference clock.

    CLOCK RECOVERY UNIT ADJUSTMENT
    10.
    发明公开

    公开(公告)号:US20240243896A1

    公开(公告)日:2024-07-18

    申请号:US18097047

    申请日:2023-01-13

    摘要: A controller includes a memory, a processor, and a first interface to a clock recovery unit that provides a recovered clock. When executed by the processor, instructions from the memory cause the controller to: instruct, via the first interface, the clock recovery unit at a first loop bandwidth to provide the recovered clock to a signal sampler; instruct, via the first interface, the clock recovery unit at a second loop bandwidth wider than the first loop bandwidth, to provide the recovered clock to the signal sampler; compare measurements from the signal sampler at the first loop bandwidth to measurements from the signal sampler at the second loop bandwidth; and instruct, via the first interface, the clock recovery unit at a third loop bandwidth to provide the recovered clock to the signal sampler applying adjustments based on comparing the measurements.