公开(公告)号：US20170111664A1

公开(公告)日：2017-04-20

申请号：US15391854

申请日：2016-12-28

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/91 ,  H04N19/172 ,  H04N19/44 ,  H04N19/423

CPC classification number: H04N19/91 ,  H04N19/172 ,  H04N19/174 ,  H04N19/423 ,  H04N19/44

Abstract: A buffering apparatus for buffering context arrays of a multi-tile encoded picture having a plurality of tiles includes a first buffer and a second buffer. The first buffer is arranged to buffer a first context array referenced for performing entropy decoding upon a first tile of the multi-tile encoded picture. The second buffer is arranged to buffer a second context array referenced for performing entropy decoding upon a second tile of the multi-tile encoded picture. When the first tile is currently decoded according to the first context array buffered in the first buffer, the second context array is buffered in the second buffer.

公开(公告)号：US20170006299A1

公开(公告)日：2017-01-05

申请号：US15197741

申请日：2016-06-29

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Yung-Chang Chang

IPC: H04N19/30 ,  H04N19/18 ,  H04N19/176

CPC classification number: H04N19/18 ,  H04N19/426 ,  H04N19/436 ,  H04N19/50

Abstract: A residual up-sampling apparatus has a residual up-sampling buffer and a shared residual up-sampling circuit. The residual up-sampling buffer stores an intermediate residual up-sampling result. The shared residual up-sampling circuit employs a same processing kernel to perform a first-direction residual up-sampling operation and a second-direction residual up-sampling operation. The first-direction residual up-sampling operation processes an inverse transform output of an inverse transform circuit to generate the intermediate residual up-sampling result to the residual up-sampling buffer. The second-direction residual up-sampling operation performs transpose access upon the residual up-sampling buffer to retrieve the intermediate residual up-sampling result, and processes the intermediate residual up-sampling result to generate a final residual up-sampling result.

Abstract translation: 残余上采样装置具有残余上采样缓冲器和共享残余上采样电路。 残余上采样缓冲器存储中间残差上采样结果。 共享残余上采样电路采用相同的处理内核来执​​行第一方向剩余上采样操作和第二方向剩余上采样操作。 第一方向残余上采样操作处理逆变换电路的逆变换输出，以产生到残余上采样缓冲器的中间剩余上采样结果。 第二方向残余上采样操作对剩余上采样缓冲器执行转置访问以检索中间剩余上采样结果，并且处理中间剩余上采样结果以产生最终剩余上采样结果。

公开(公告)号：US09538174B2

公开(公告)日：2017-01-03

申请号：US13781770

申请日：2013-03-01

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Yung-Chang Chang

IPC: H04N19/109 ,  H04N7/26 ,  H04N19/129 ,  H04N19/176 ,  H04N19/44 ,  H04N19/423

CPC classification number: H04N19/129 ,  H04N19/176 ,  H04N19/423 ,  H04N19/44

Abstract: A method and apparatus for decoding two-level scanned transform coefficients corresponding to a transform unit (TU) are disclosed. The TU is divided into sub-blocks and the transform coefficients of the TU are scanned across the sub-blocks according to a first scan pattern, and each sub-block is scanned according to a second scan pattern. In one embodiment, the sub-blocks of the transform coefficients received from the variable length decoding are stored in an inverse scan buffer (or TC buffer) and the transform coefficients are retrieved from the inverse scan buffer row-by-row or column-by-column in a selected direction after a corresponding row or column of the transform coefficients is fully received. In a system incorporating an embodiment of the present invention, at least a leading row or a leading column of the transform coefficients is available in the selected direction before a last sub-block of the transform coefficients arrives.

Abstract translation: 公开了一种用于解码对应于变换单元（TU）的两级扫描变换系数的方法和装置。 TU被划分为子块，并且根据第一扫描模式跨越子块扫描TU的变换系数，并且根据第二扫描模式来扫描每个子块。 在一个实施例中，从可变长度解码接收的变换系数的子块被存储在反向扫描缓冲器（或TC缓冲器）中，并且逐行或逐列从逆扫描缓冲器检索变换系数 在完全接收到变换系数的相应行或列之后的所选方向上的列。 在结合了本发明的实施例的系统中，在变换系数的最后一个子块到达之前，变换系数的至少一个前导行或前导列在所选方向上可用。

公开(公告)号：US09438911B2

公开(公告)日：2016-09-06

申请号：US13944893

申请日：2013-07-18

Applicant: MEDIATEK INC.

Inventor： Huei-Min Lin ,  Ping Chao ,  Chi-Cheng Ju ,  Yung-Chang Chang

IPC: H04N19/00 ,  H04N19/80 ,  H04N19/423

CPC classification number: H04N19/80 ,  H04N19/423

Abstract: A video processing system includes a data buffer and a storage controller. The data buffer is shared between a plurality of in-loop filters, wherein not all of the in-loop filters comply with a same video standard. The storage controller controls data access of the data buffer, wherein for each in-loop filter granted to access the data buffer, the data buffer stores a partial data of a picture processed by the in-loop filter. Another video processing system includes a storage device and a storage controller. The storage controller adaptively determines a size of a storage space according to a tile partition setting of a picture to be processed by an in-loop filter, and controls the storage device to allocate the storage space to serve as a data buffer for storing data of the in-loop filter.

Abstract translation: 视频处理系统包括数据缓冲器和存储控制器。 数据缓冲器在多个环路滤波器之间共享，其中并非所有的环路滤波器都符合相同的视频标准。 存储控制器控制数据缓冲器的数据访问，其中对于被授权访问数据缓冲器的每个环路滤波器，数据缓冲器存储由环路滤波器处理的图像的部分数据。 另一视频处理系统包括存储设备和存储控制器。 存储控制器根据由环路过滤器处理的图像的瓦片分区设置自适应地确定存储空间的大小，并且控制存储设备分配存储空间以用作用于存储数据的数据的数据缓冲器 内置滤波器。

公开(公告)号：US09414058B2

公开(公告)日：2016-08-09

申请号：US13726547

申请日：2012-12-25

Applicant: MEDIATEK INC.

Inventor： Yung-Chang Chang

IPC: H04N19/44 ,  H04N19/105 ,  H04N19/117 ,  H04N19/132 ,  H04N19/186 ,  H04N19/182

CPC classification number: H04N19/186 ,  H04N19/105 ,  H04N19/117 ,  H04N19/132 ,  H04N19/139 ,  H04N19/182 ,  H04N19/44 ,  H04N19/86

Abstract: A video processing apparatus includes a control unit, a storage device, a video decoder and a video processor. The control unit is arranged for generating a color depth control signal. The video decoder is coupled to the storage device, and arranged for decoding an encoded video bitstream and accordingly generating decoded video pictures (sequence) to the storage device. The video processor is coupled to the control unit and the storage device, and arranged for referring to the color depth control signal to enable a target video processing mode selected from a plurality of supported video processing modes respectively corresponding to different output color depths, and processing picture data derived from the data buffered in the storage device under the target video processing mode to generate output video pictures (sequence) to a display apparatus.

Abstract translation: 视频处理装置包括控制单元，存储装置，视频解码器和视频处理器。 控制单元被布置用于产生颜色深度控制信号。 视频解码器耦合到存储设备，并且被布置用于对编码的视频比特流进行解码，并相应地向存储设备生成解码的视频图像（序列）。 视频处理器耦合到控制单元和存储设备，并且被布置为参考颜色深度控制信号，以便能够分别对应于不同的输出颜色深度的多个支持的视频处理模式中选择的目标视频处理模式，以及处理 从在目标视频处理模式下缓存在存储装置中的数据导出的图像数据，以产生输出视频图像（序列）到显示装置。

公开(公告)号：US09344717B2

公开(公告)日：2016-05-17

申请号：US13887836

申请日：2013-05-06

Applicant: MEDIATEK INC.

Inventor： Ping Chao ,  Yung-Chang Chang ,  Chi-Cheng Ju

IPC: H04N19/117 ,  H04N19/82 ,  H04N19/423 ,  H04N19/86

CPC classification number: H04N19/117 ,  H04N19/423 ,  H04N19/82 ,  H04N19/86

Abstract: A method and apparatus for SAO (sample adaptive offset) processing in a video decoder are disclosed. Embodiments according to the present invention reduce the required line buffer associated with the SAO processing. According to one embodiment, tri-level comparison results for one deblocked pixel row or column of the image unit are determined according to SAO type of the deblocked pixel row or column. The tri-level comparison results are stored in a buffer and the tri-level comparison results are read back from the buffer for SAO processing of the subsequent row or column from a subsequent image unit. The comparison results correspond to “larger”, “equal” and “smaller” states. The comparison results can be stored more efficiently.

Abstract translation: 公开了一种用于视频解码器中的SAO（采样自适应偏移）处理的方法和装置。 根据本发明的实施例减少了与SAO处理相关联的所需线路缓冲器。 根据一个实施例，根据解锁像素行或列的SAO类型来确定图像单元的一个去块像素行或列的三电平比较结果。 三电平比较结果存储在缓冲器中，三级比较结果从缓冲器中读出，用于后续行或列从后续图像单元进行SAO处理。 比较结果对应于“较大”，“相等”和“较小”状态。 比较结果可以更有效地存储。

公开(公告)号：US20160029022A1

公开(公告)日：2016-01-28

申请号：US14806664

申请日：2015-07-23

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Chih-Ming Wang ,  Yung-Chang Chang ,  Chun-Chia Chen ,  Meng-Jye Hu ,  Huei-Min Lin

IPC: H04N19/119 ,  H04N19/91

CPC classification number: H04N19/119 ,  H04N19/157 ,  H04N19/176 ,  H04N19/91 ,  H04N19/96

Abstract: A video processing apparatus includes a first processing circuit, a second processing circuit, and a control circuit. The first processing circuit performs a first processing operation. The second processing circuit performs a second processing operation different from the first processing operation. The control circuit generates at least one output coding unit to the second processing circuit according to an input coding unit generated from the first processing circuit, wherein the control circuit checks a size of the input coding unit to selectively split the input coding unit into a plurality of output coding units.

Abstract translation: 视频处理装置包括第一处理电路，第二处理电路和控制电路。 第一处理电路执行第一处理操作。 第二处理电路执行与第一处理操作不同的第二处理操作。 所述控制电路根据从所述第一处理电路产生的输入编码单元，向所述第二处理电路生成至少一个输出编码单元，其中，所述控制电路检查所述输入编码单元的大小，以选择性地将所述输入编码单元分割成多个 的输出编码单元。

公开(公告)号：US20140037017A1

公开(公告)日：2014-02-06

申请号：US13944893

申请日：2013-07-18

Applicant: MEDIATEK INC.

Inventor： Huei-Min Lin ,  Ping Chao ,  Chi-Cheng Ju ,  Yung-Chang Chang

IPC: H04N7/26

CPC classification number: H04N19/80 ,  H04N19/423

Abstract: A video processing system includes a data buffer and a storage controller. The data buffer is shared between a plurality of in-loop filters, wherein not all of the in-loop filters comply with a same video standard. The storage controller controls data access of the data buffer, wherein for each in-loop filter granted to access the data buffer, the data buffer stores a partial data of a picture processed by the in-loop filter. Another video processing system includes a storage device and a storage controller. The storage controller adaptively determines a size of a storage space according to a tile partition setting of a picture to be processed by an in-loop filter, and controls the storage device to allocate the storage space to serve as a data buffer for storing data of the in-loop filter.

Abstract translation: 视频处理系统包括数据缓冲器和存储控制器。 数据缓冲器在多个环路滤波器之间共享，其中并非所有的环路滤波器都符合相同的视频标准。 存储控制器控制数据缓冲器的数据访问，其中对于被授权访问数据缓冲器的每个环路滤波器，数据缓冲器存储由环路滤波器处理的图像的部分数据。 另一视频处理系统包括存储设备和存储控制器。 存储控制器根据由环路过滤器处理的图像的瓦片分区设置自适应地确定存储空间的大小，并且控制存储设备分配存储空间以用作用于存储数据的数据的数据缓冲器 内置滤波器。

公开(公告)号：US08599924B2

公开(公告)日：2013-12-03

申请号：US13859970

申请日：2013-04-10

Applicant: MediaTek Inc.

Inventor： Yung-Chang Chang ,  Chih-Ming Wang ,  Kun-Bin Lee

IPC: H04N7/12

CPC classification number: H04N19/00684 ,  H04N19/176 ,  H04N19/44 ,  H04N19/46 ,  H04N19/513 ,  H04N19/61 ,  H04N19/70

Abstract: A video decoding apparatus includes a bitstream parser, a calculator and a memory. The bitstream parser is provided to receive a video bitstream and extracting a set of constraints associated with the video bitstream, wherein the set of constraints has information associated with a direct_8×8_inference flag for a macroblock of a picture, wherein the macroblock has N sub-macroblock partitions. The calculator is provided to calculate first motion vector information associated with the macroblock and obtain second motion vector information associated with K of the N sub-macroblock partitions from the first motion vector information according to the information associated with the direct_8×8_inference flag, wherein K is less than N. The memory is provided to store the second motion vector information.

公开(公告)号：US11051045B2

公开(公告)日：2021-06-29

申请号：US16815957

申请日：2020-03-11

Applicant: MEDIATEK INC.

Inventor： Ping Chao ,  Chih-Ming Wang ,  Yung-Chang Chang

IPC: H04N19/82 ,  H04N19/42 ,  H04N19/423

Abstract: A method and a circuit for adaptive loop filtering in a video coding system are described. The method can include receiving a block of samples generated from a previous-stage filter circuit in a filter pipeline, the block of samples being one of multiple blocks included in a current picture, performing, in parallel, adaptive loop filter (ALF) processing for multiple target samples in the block of samples, while the previous-stage filter circuit is simultaneously processing another block in the current picture, storing, in a buffer, first samples each having a filter input area defined by a filter shape that includes at least one sample which has not been received, and storing, in the buffer, second samples included in the filter input areas of the first samples.