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公开(公告)号：US5333162A
公开(公告)日：1994-07-26
申请号：US22578
申请日：1993-02-23
申请人： Kenneth J. Condreva
发明人： Kenneth J. Condreva
摘要： A high resolution counter circuit measures the time interval between the occurrence of an initial and a subsequent electrical pulse to two nanoseconds resolution using an eight megahertz clock. The circuit includes a main counter for receiving electrical pulses and generating a binary word--a measure of the number of eight megahertz clock pulses occurring between the signals. A pair of first and second pulse stretchers receive the signal and generate a pair of output signals whose widths are approximately sixty-four times the time between the receipt of the signals by the respective pulse stretchers and the receipt by the respective pulse stretchers of a second subsequent clock pulse. Output signals are thereafter supplied to a pair of start and stop counters operable to generate a pair of binary output words representative of the measure of the width of the pulses to a resolution of two nanoseconds. Errors associated with the pulse stretchers are corrected by providing calibration data to both stretcher circuits, and recording start and stop counter values. Stretched initial and subsequent signals are combined with autocalibration data and supplied to an arithmetic logic unit to determine the time interval in nanoseconds between the pair of electrical pulses being measured.
摘要翻译： 高分辨率计数器电路使用八兆赫兹时钟来测量初始和后续电脉冲发生到两纳秒分辨率之间的时间间隔。 该电路包括用于接收电脉冲并产生二进制字的主计数器 - 测量信号之间出现的8兆赫兹时钟脉冲的数量。 一对第一和第二脉冲展开器接收信号并产生一对输出信号，其宽度大约是各个脉冲展开器接收信号之间的时间的六十四倍，并且由相应的脉冲展开器接收第二个 后续时钟脉冲。 输出信号此后被提供给一对启动和停止计数器，其可操作用于产生代表脉冲宽度测量的一对二进制输出字，以二纳秒的分辨率。 通过向两个担架电路提供校准数据以及记录起始和停止计数器值来校正与脉冲担架相关联的错误。 拉伸的初始和后续信号与自动校准数据组合并提供给算术逻辑单元以确定被测量的一对电脉冲之间的纳秒内的时间间隔。
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公开(公告)号：US5325341A
公开(公告)日：1994-06-28
申请号：US936989
申请日：1992-08-31
申请人： J. Greg Viot , Robert J. Amedeo , Nancy L. Thomas , Marc L. DeWever , Dale J. Kumke , Everett R. Lumpkin
发明人： J. Greg Viot , Robert J. Amedeo , Nancy L. Thomas , Marc L. DeWever , Dale J. Kumke , Everett R. Lumpkin
CPC分类号： G04F10/04
摘要： A digital timer apparatus incorporates a free running counter, an interval timer, a capture register, a pulse accumulator; holding logic and mode selection logic. In one mode of operation, a rising or falling edge of an external signal causes the current contents of the free running counter to be loaded into the capture register, causes the previous value of the capture register to be transferred to a holding register and causes the pulse accumulator to be incremented. A read of the capture holding register causes the pulse accumulator value to be transferred to a holding register and causes the pulse accumulator to be reset. The output of the interval timer can cause an interrupt signal to be generated to request service from a central processing unit. The timer apparatus is particularly well suited to performing tasks related to the determination of the speed of rotation of a rotating member and may be used, for instance, in detecting wheel rotational speeds in an anti-lock brake system or detecting shaft rotation speeds in an automatic transmission.
摘要翻译： 数字定时器装置包括自由运行计数器，间隔定时器，捕获寄存器，脉冲累加器; 保持逻辑和模式选择逻辑。 在一种操作模式中，外部信号的上升或下降沿使自由运行计数器的当前内容加载到捕捉寄存器中，使得捕获寄存器的先前值被传送到保持寄存器，并导致 脉冲累加器增加。 捕获保持寄存器的读取将脉冲累加器值传送到保持寄存器，并使脉冲累加器复位。 间隔定时器的输出可以产生中断信号以从中央处理单元请求服务。 定时器装置特别适合于执行与确定旋转部件的旋转速度有关的任务，并且可以用于例如在防抱死制动系统中检测轮转速或检测轴转速 自动变速器。
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公开(公告)号：US5150337A
公开(公告)日：1992-09-22
申请号：US482639
申请日：1990-02-21
申请人： Michael Inbar
发明人： Michael Inbar
摘要： An apparatus and a method for determining the time difference between electrical events utilizes a sinusoidal signal as a reference from which to determine the elapsed time between events represented as electrical pulses. A sine wave and a cosine wave are multiplexed to produce the sinusoidal reference signal. When an event occurs, as indicated by an electrical pulse, the sine wave and the cosine wave are sampled to produce two digital values. A comparator determines which of the two digital values falls within a predetermined range, and transmits a select signal to multiplexer. The multiplexer selects the digital value which falls within the predetermined range. The selected digital value corresponds to an angle value which can be uniquely determined within one cycle of the sinusoidal reference signal. A cycle counter accounts for the number of full cycles which elapse until the next event is detected. The digital information for each event, including the angular position of each event within a cycle of the reference signal, and the number of cycles between events, is stored within a random access memory (RAM) and transmitted to a computer. The time difference between events is then advantageously calculated in real time within the computer using the known frequency of the effective reference signal.
摘要翻译： 用于确定电事件之间的时间差的装置和方法利用正弦信号作为参考，从而确定表示为电脉冲的事件之间的经过时间。 正弦波和余弦波被多路复用以产生正弦参考信号。 当事件发生时，如电脉冲所示，正弦波和余弦波被采样以产生两个数字值。 比较器确定两个数字值中的哪一个落在预定范围内，并将选择信号发送到多路复用器。 复用器选择落在预定范围内的数字值。 所选择的数字值对应于可以在正弦参考信号的一个周期内唯一确定的角度值。 循环计数器考虑到检测到下一个事件之前经过的完整循环次数。 每个事件的数字信息，包括参考信号周期内的每个事件的角位置以及事件之间的周期数，被存储在随机存取存储器（RAM）内并传送到计算机。 然后可利用有效参考信号的已知频率在计算机内实时计算出事件之间的时间差。
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公开(公告)号：US5128624A
公开(公告)日：1992-07-07
申请号：US645874
申请日：1991-01-25
摘要： A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality of signal delay elements that are connected in series. Intermediate points between the delay elements provide delayed pulses having different delay times. Upon receiving the second input pulse, a selector selects one delay pulse provided by the delay element at which the first input pulse has arrived, and generates a digital positional signal indicating a position of the selected delay element. The number of rounds of circulation of the first input pulse in the ring signal delay circuit is separately counted. According to the number of rounds of circulation of the first pulse and the positional signal, the digital signal indicating the phase difference between the first and second input phases is formed.
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公开(公告)号：US5075878A
公开(公告)日：1991-12-24
申请号：US687198
申请日：1991-04-18
申请人： Fumio Ohtomo , Masahiro Ohishi
发明人： Fumio Ohtomo , Masahiro Ohishi
摘要： High resolution measuring systems use a continuous series of laser pulses in measuring distance to an object. An approximate time difference between transmitted and reflected pulses is derived. A second, more accurate, time difference is derived through use of a reference signal sampled in correlation to the pulse signal in order to derive a sampled waveform signal having a period which is long relative to the period of the pulse signal. Phase difference measurements of this sampled waveform provide delay time measurements of high accuracy. The high accuracy and approximate time difference signals are combined to determine time difference between measurement pulses with increased resolution. Time difference is converted to precision distance measurments, with greater accuracy available by averaging several measurements. Several embodiments are described.
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公开(公告)号：US4983924A
公开(公告)日：1991-01-08
申请号：US367160
申请日：1989-06-16
申请人： Timothy L. Hillstrom
发明人： Timothy L. Hillstrom
CPC分类号： G01R13/32
摘要： Time/frequency skew between a plurality of simultaneously operated swept instruments is minimized by sharing a common master clock signal among the instruments and resetting the phases of internal clocking signals in each instrument to known states. Once reset, the clocking signals in each of the instruments operate in tandem. Consequently, the triggering latency period among all the instruments is uniform and subsequent triggered sweeps begin at substantially the same instant, providing accurate sweep tracking among a plurality of instruments.
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公开(公告)号：US4979177A
公开(公告)日：1990-12-18
申请号：US427157
申请日：1989-10-26
申请人： Ronald M. Jackson
发明人： Ronald M. Jackson
IPC分类号： G01R13/28 , G01R31/3177 , G04F10/04 , G06F1/14 , G06F11/22 , G06F11/25 , G06F11/34 , H03M1/66
CPC分类号： G04F10/04 , G01R31/3177 , G06F1/14 , G06F11/25
摘要： A logic analyzer has a counter/timer that can reconstruct the higher resolution with which data was acquired using multiple phases of the logic analyzer system clock signal. For a two-phase data sampling system, separate pairs of event recognizers monitor the data collected using the two phases of the system clock. Counter/timer control logic uses the information from these separate pairs of event recognizers to control the behavior of the counter/timer so that it can either single count or double count, depending on whether an event was true during both phases or only one phase of the data acquisition, thus allowing the counter/timer resolution to be as high as the information inherent in the data acquired using both clock phases. The counter/timer employed is capable of single or double counting and has two stages, a prescaler and an extension counter/timer, for increased power and cost effectiveness. An event recognizer is capable of recognizing words, ranges, unstable data, glitches, and/or other signal characteristics.
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公开(公告)号：US4956825A
公开(公告)日：1990-09-11
申请号：US475164
申请日：1990-02-05
摘要： A usage monitor is provided for electrical appliances, primarily for televisions, which keeps track of appliance usage during a moving time interval, such as the week immediately prior to the instant moment, and provides a readout of a number of hours per unit time that the device has been on. In the television implementation illustrated and claimed, a power interfacing box is used into which the television plug is inserted, and the box has a key-operated switch which enables the time monitoring to be temporarily deactivated in the event the parents wish to watch some television.
摘要翻译： 为电器提供使用监视器，主要用于电视机，其在移动时间间隔期间跟踪设备使用情况，例如紧接瞬间之前的一周，并且提供每单位时间的小时数的读出 设备已经开启。 在所示和所要求保护的电视实施例中，使用插入电视插头的电源接口盒，并且该盒具有按键操作的开关，其能够在父母希望观看某些电视的情况下临时停用时间监视 。
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公开(公告)号：US4769798A
公开(公告)日：1988-09-06
申请号：US151181
申请日：1988-02-01
申请人： Mishio Hayashi
发明人： Mishio Hayashi
CPC分类号： G01R23/06 , G04F10/105
摘要： An apparatus which successively converts the period defined by successive two pulses of a series of input pulses into a voltage, and in which fractional times between input pulses and clock pulses are converted, by two fractional time-to-voltage converters alternately with each other, into voltage signals and the voltage signals thus alternately yielded by the two converters are alternately applied, by a change-over switch, to a subtractor, wherein a later one of the two successive voltage signals is always subtracted from the earlier one of them, creating a difference signal therebetween. At the same time, the number of clock pulses present between the two input pulses corresponding to the two voltage signals is counted and the count value is converted to analog form, which is added to the difference signal, obtaining the voltage corresponding to the period between the two input pulses.
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公开(公告)号：US4652139A
公开(公告)日：1987-03-24
申请号：US852680
申请日：1986-04-16
申请人： James R. Sulcer, Jr.
发明人： James R. Sulcer, Jr.
摘要： An electronic non-volatile elapsed time meter useful for generating elapsed time information when connected in parallel with an input supply voltage supplying power to a power driven device. Visual readouts are continuously generated during time of use of the input supply voltage and accumulated intervals of time of use are stored in a non-volatile memory when power is removed from the device. Upon a later resumption of power usage, the stored non-volatile data is retrieved, displayed and summed with the new generated elapsed time information. This meter is applicable to both AC and DC operations.
摘要翻译： 一种电子非易失性经过时间计，用于当与向驱动装置供电的输入电源电压并行连接时产生经过时间信息。 在使用输入电源电压的时间期间连续地产生视觉读数，并且当从设备移除电力时，累积的使用时间间隔被存储在非易失性存储器中。 在稍后恢复使用电力之后，存储的非易失性数据被检索，显示并与新生成的经过时间信息相加。 该仪表适用于交流和直流操作。
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