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    Memory device and slew rate detector
    2.
    发明授权
    Memory device and slew rate detector 有权

    公开(公告)号：US11799461B1

    公开(公告)日：2023-10-24

    申请号：US18077172

    申请日：2022-12-07

    申请人： Winbond Electronics Corp.

    发明人： Yen-Yu Chou

    IPC分类号： H03K5/00 ,  H03K5/12 ,  H03K19/20 ,  H03K5/24 ,  H03K5/04 ,  H03K5/1534

    CPC分类号： H03K5/12 ,  H03K5/04 ,  H03K5/1534 ,  H03K5/249 ,  H03K19/20

    摘要： A memory device and a slew rate detector are provided. The slew rate detector includes a clock signal generator, a pulse signal generator, a plurality of sampling comparators, and a detection result generator. The clock signal generator multiplies a frequency of a base clock signal to generate clock signals. The pulse signal generator generates first pulse signals and second pulse signals according to the clock signals. Each of the sampling comparators samples each of transmission signals to generate a reference signal according to the first pulse signals, and samples each of the transmission signals to generate a comparison signal according to the second pulse signals. The sampling comparators compare the reference signals with the comparison signals to generate comparison results. The detection result generator performs an operation on the comparison results to generate detection results.

    SOURCE FOLLOWER CIRCUIT
    3.
    发明公开
    SOURCE FOLLOWER CIRCUIT 审中-公开

    公开(公告)号：US20230307476A1

    公开(公告)日：2023-09-28

    申请号：US17821804

    申请日：2022-08-24

    申请人： REALTEK SEMICONDUCTOR CORPORATION

    发明人： SHIH-HSIUNG HUANG ,  CHIA-WEI KAO

    IPC分类号： H01L27/146 ,  H03K5/04

    CPC分类号： H01L27/14614 ,  H03K5/04

    摘要： The present application discloses a source follower circuit, arranged for generating output signal according to input signal. The circuit includes: a first transistor having a drain coupled to a first reference voltage; a second transistor having a drain coupled to a source of the first transistor, and the first transistor and the second transistor both have polarization of a first type; a first capacitor, coupled between a gate of the first transistor and the input signal; and a first resistor, coupled between the gate of the first transistor and a first bias voltage; wherein a gate of the second transistor is coupled to the input signal, and a source of the second transistor outputs the output signal.

    Method and Apparatus for Reducing Capacitor-Induced Noise
    4.
    发明申请
    Method and Apparatus for Reducing Capacitor-Induced Noise 审中-公开

    公开(公告)号：US20190086942A1

    公开(公告)日：2019-03-21

    申请号：US15708229

    申请日：2017-09-19

    申请人： Apple Inc.

    发明人： Jong-Suk Lee ,  Ramesh B. Gunna ,  Shih-Chieh Wen

    IPC分类号： G05F1/46 ,  H03K5/04

    CPC分类号： G05F1/46 ,  G06F1/26 ,  H03K5/04 ,  H03K19/00346

    摘要： A method and apparatus for reducing capacitor noise in electronic systems is disclosed. A system includes at least one functional circuit block coupled to receive a variable supply voltage. The value of the supply voltage is controlled by a power management circuit. Changing a performance state of the functional circuit block includes increasing the supply voltage for higher performance, and reducing the supply voltage for reduced performance demands. The power management circuit, in changing to a higher performance state, increases the supply voltage at a first rate. A rate control circuit causes the power management circuit to reduce the supply voltage, when changing to a lower performance state, at a second rate that is less than the first rate.

    SIGNAL OUTPUT CIRCUIT
    5.
    发明申请
    SIGNAL OUTPUT CIRCUIT 审中-公开

    公开(公告)号：US20190020332A1

    公开(公告)日：2019-01-17

    申请号：US16065199

    申请日：2017-01-16

    申请人： DENSO CORPORATION

    发明人： Norimasa OKA ,  Hiroshi KAWAGO

    IPC分类号： H03K4/56 ,  H03K17/16 ,  H03K19/0175 ,  H03K5/12

    CPC分类号： H03K4/56 ,  H03K5/04 ,  H03K5/12 ,  H03K5/1252 ,  H03K17/16 ,  H03K19/0175 ,  H03K19/018521

    摘要： A signal output circuit includes a slope control circuit, a capacitor, a noise detector circuit and a fail-safe circuit. The slope control circuit charges and discharges the capacitor, the first terminal of which is connected to an output terminal, according to the control signal level, and drives transistors using the voltage of the second terminal of the capacitor, thereby controlling the slope of the output single. The noise detector circuit detects noise superimposed on the output terminal. When noise is detected, the fail-safe circuit performs a forced drive operation on the transistor to output the output signal at a level corresponding to the level of the control signal is output, regardless of the transistor being driven by the slope control circuit.

    DIGITAL ON-CHIP DUTY CYCLE MONITORING DEVICE
    6.
    发明申请
    DIGITAL ON-CHIP DUTY CYCLE MONITORING DEVICE 审中-公开

    公开(公告)号：US20180364752A1

    公开(公告)日：2018-12-20

    申请号：US15622350

    申请日：2017-06-14

    申请人： Apple Inc.

    发明人： Huaimin Li ,  Fabien S Faure ,  Shy Hamami ,  Pradeep Trivedi ,  Yaron Cohen

    IPC分类号： G06F1/08 ,  H03K3/017 ,  H03K21/08 ,  H03K5/04

    CPC分类号： G06F1/08 ,  H03K3/017 ,  H03K5/04 ,  H03K21/08 ,  H03K2005/00019

    摘要： An apparatus includes an oscillator circuit, a counter circuit, and a control circuit. The oscillator circuit may receive an input clock signal and an inverse input clock signal, and, for a first time period, may generate an oscillator output signal with a frequency based on a duty cycle of the input clock signal. For a second time period, the oscillator circuit may generate the oscillator output signal with a frequency based on a duty cycle of the inverse input clock signal. The counter circuit may count oscillations of the oscillator output signal over the first time period and over the second time period. The control circuit may determine, based on the oscillations counted by the counter circuit during the first time period and the second time period, a duty cycle value indicative of the duty cycle of the input clock signal.

    SLEW RATE ENHANCEMENT CIRCUIT AND BUFFER USING THE SAME
    7.
    发明申请
    SLEW RATE ENHANCEMENT CIRCUIT AND BUFFER USING THE SAME 审中-公开

    公开(公告)号：US20180337662A1

    公开(公告)日：2018-11-22

    申请号：US15980288

    申请日：2018-05-15

    申请人： Aconic Inc.

    发明人： Minjae LEE ,  Eunseok SONG

    IPC分类号： H03K5/04

    CPC分类号： H03K5/04 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2310/066 ,  G09G2320/0252 ,  G09G2330/021

    摘要： The slew rate enhancement circuit includes: a first transistor located between a first power source and an eleventh node, the first transistor having a gate electrode coupled to the eleventh node, the first transistor being coupled as a current mirror to the first current source; a third current source having the other side coupled to a second power source lower than the first power source; a second transistor coupled between the first power source and the eleventh node; a third transistor coupled between the eleventh node and one side of the third current source; a fourth transistor coupled between the first power source and a twelfth node; and a fifth transistor coupled between the twelfth node and the one side of the third current source.

    RECEIVER, COMMUNICATION DEVICE, AND COMMUNICATION METHOD
    8.
    发明申请
    RECEIVER, COMMUNICATION DEVICE, AND COMMUNICATION METHOD 审中-公开

    公开(公告)号：US20180302068A1

    公开(公告)日：2018-10-18

    申请号：US16013430

    申请日：2018-06-20

    申请人： Renesas Electronics Corporation

    发明人： Hirokazu NAGASE ,  Koichi TAKEDA ,  Shunichi KAERIYAMA

    IPC分类号： H03K5/04

    CPC分类号： H03K5/04 ,  H03K17/61

    摘要： To provide a receiver, a communication device, and a communication method capable of restoring a signal transmitted via a non-contact transmission channel with high accuracy. A communication device has a transmission circuit that converts an input signal into a pulse, a non-contact transmission channel that has a primary side coil and a secondary side coil and transmits the pulse from the transmission circuit in a non-contact manner, a restoration circuit that restores the input signal on the basis of a reception signal corresponding to the pulse transmitted via the non-contact transmission channel, an initialization unit that initializes an output of the non-contact transmission channel, and an initialization control unit that outputs a control signal of controlling the initialization unit on the basis of the reception signal corresponding to the pulse received via the non-contact transmission channel.

    Minimum pulse-width assurance
    10.
    发明授权
    Minimum pulse-width assurance 有权

    公开(公告)号：US10033366B2

    公开(公告)日：2018-07-24

    申请号：US15831047

    申请日：2017-12-04

    申请人： Silanna Asia Pte Ltd

    发明人： Barry S. Arbetter

    IPC分类号： H02M3/156 ,  H03K5/156 ,  H02M3/157 ,  H03K3/0233

    CPC分类号： H03K5/1565 ,  H02M1/32 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H03K3/02337 ,  H03K5/04 ,  H03K5/06 ,  H03K5/1252 ,  H03K5/156

    摘要： Various methods and devices that involve pulsed signals are disclosed. An example minimum pulse-width (MPW) circuit comprises a first and second logic circuit. A first input of the first logic circuit is connected to an input of the MPW circuit. A first input of the second logic circuit is communicatively coupled to an output of the first logic circuit. The MPW circuit also comprises a MPW filter circuit communicatively coupled to an output of the second logic circuit, a one-shot circuit communicatively coupled to an output of the minimum pulse-width filter circuit and located on a first feedback path, and another one-shot circuit communicatively coupled to the output of the minimum pulse-width filter circuit and located on a second feedback path. A second input of the first logic circuit is on the first feedback path. A second input of the second logic circuit is on the second feedback path.