公开(公告)号：US20190115326A1

公开(公告)日：2019-04-18

申请号：US16206868

申请日：2018-11-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Shien Chen ,  Hsiu-Jen Lin ,  Ming-Chih Yew ,  Ming-Da Cheng ,  Yi-Jen Lai ,  Yu-Tse Su ,  Sey-Ping Sun ,  Yang-Che Chen

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00

Abstract: An embodiment package includes a first package. The first package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and redistribution layers over the encapsulant and the first integrated circuit die. The package also includes a second package bonded to the first package by a plurality of functional connectors. The functional connectors and the redistribution layers electrically connect a second integrated circuit die of the second package to the first integrated circuit die. The package also includes a plurality of dummy connectors disposed between the first package and the second package. One end of each of the plurality of dummy connectors facing the first package is physically separated from the first package.

公开(公告)号：US20190035774A1

公开(公告)日：2019-01-31

申请号：US15907409

申请日：2018-02-28

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Jen Lai ,  Lin Chung-Yi ,  Hsi-Kuei Cheng ,  Chen-Shien Chen ,  Kuo-Chio Liu

IPC: H01L25/00 ,  H01L21/683 ,  H01L23/00 ,  H01L21/56 ,  H01L25/18 ,  H01L23/31 ,  H01L23/60

Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.

公开(公告)号：US20180076184A1

公开(公告)日：2018-03-15

申请号：US15669563

申请日：2017-08-04

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Shien Chen ,  Hsiu-Jen Lin ,  Ming-Chih Yew ,  Ming-Da Cheng ,  Yi-Jen Lai ,  Yu-Tse Su ,  Sey-Ping Sun ,  Yang-Che Chen

IPC: H01L25/10 ,  H01L25/00 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/105 ,  H01L23/00 ,  H01L23/31 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/20 ,  H01L25/50 ,  H01L2225/1058

Abstract: An embodiment package includes a first package. The first package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and redistribution layers over the encapsulant and the first integrated circuit die. The package also includes a second package bonded to the first package by a plurality of functional connectors. The functional connectors and the redistribution layers electrically connect a second integrated circuit die of the second package to the first integrated circuit die. The package also includes a plurality of dummy connectors disposed between the first package and the second package. One end of each of the plurality of dummy connectors facing the first package is physically separated from the first package.

公开(公告)号：US08952534B2

公开(公告)日：2015-02-10

申请号：US14083521

申请日：2013-11-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Jen Lai ,  Chih-Kang Han ,  Chien-Pin Chan ,  Chih-Yuan Chien ,  Huai-Tei Yang

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/683

CPC classification number: H01L24/13 ,  H01L21/6836 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/6834 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/81001 ,  H01L2224/812 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/3651 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate, a pad region on the semiconductor substrate, a passivation layer over the semiconductor substrate and at least a portion of the pad region, and a bump structure overlying the pad region. The passivation layer has an opening defined therein to expose at least another portion of the pad region. The bump structure is electrically connected to the pad region via the opening. The bump structure includes a copper layer and a SnAg layer overlying the copper layer. The SnAg layer has a melting temperature higher than the eutectic temperature of Sn and Ag.

Abstract translation: 半导体器件包括半导体衬底，半导体衬底上的焊盘区域，半导体衬底上的钝化层以及焊盘区域的至少一部分，以及覆盖焊盘区域的凸块结构。 钝化层具有限定在其中的开口以暴露焊盘区域的至少另一部分。 凸起结构经由开口电连接到焊盘区域。 凸块结构包括铜层和覆盖铜层的SnAg层。 SnAg层的熔融温度高于Sn和Ag的共晶温度。