Abstract:
In a sequential circuit, a first stage is configured to charge a voltage of a first node in response to a clock, and to discharge the voltage of the first node in response to the clock, a voltage of a second node, and data; a second stage is configured to charge the voltage of the second node in response to the clock, and to discharge the voltage of the second node in response to the clock and a logic signal; a combinational logic is configured to generate the logic signal based on the voltage of the first node, the voltage of the second node, and the data; and a latch circuit is configured to latch the voltage of the second node in response to the clock.
Abstract:
A three-dimensional holographic display device includes a light emitting diode (LED) array including a plurality of light sources controlled to sequentially output light according to a preset pattern, a lens configured to refract light incident from the LED array, a spatial light modulator (SLM) configured to modulate light incident from the lens, and a processor configured to generate a plurality of holographic signals each comprising depth information adjusted according to an arrangement location of each of the plurality of light sources, and for each of the plurality of light sources, control the SLM to modulate the light based on a holographic signal corresponding to the light source.
Abstract:
An electronic device is provided. The electronic device includes a battery, a power management module, a charging circuit, and a processor including a central processing unit (CPU) and a plurality of intellectual property (IP) blocks. The charging circuit is connected to the processor and includes a first pin to output a first overcurrent warning signal. The power management module is connected to the processor and includes a second pin to output a reset warning signal. The processor includes a first general purpose input output (GPIO) pin to receive the first overcurrent warning signal, and is configured to reduce at least one clock frequency among a plurality of clock frequencies set to each of the CPU and the plurality of IP blocks, or reduce at least one operation clock frequency of components inside the electronic device when the first overcurrent warning signal is received through the first GPIO pin.
Abstract:
Disclosed is a nanocrystalline boron nitride film having a relatively low dielectric constant and excellent mechanical properties. The nanocrystalline boron nitride film includes a crystalline boron nitride compound, and has a dielectric constant within a range of 2.5 to 5.5 at a 100 kHz operating frequency.
Abstract:
An electronic device may include a first housing, a second housing configured to accommodate at least a part of the first housing and guide sliding movement of the first housing, a flexible display including a first display area coupled to the first housing and a second display area extending from the first display area, a gear disposed inside the second housing and configured to move the flexible display, a motor configured to rotate the gear, at least one sensor, and at least one processor. The at least one processor may be configured to identify a state of the electronic device including at least one of a battery current, a battery voltage, an internal consumption current, a battery level, or an electronic device temperature, based on information sensed through the at least one sensor, and control a speed of the motor or discontinue driving of the motor based on the state of the electronic device.
Abstract:
A semiconductor device including first and second standard cells disposed in one of a first direction and a second direction intersecting the first direction, the first and second directions parallel to a substrate, and each of the first and second standard cells including a gate structure and an active region, and a filler cell adjacent to the first standard cell in the second direction and adjacent to the second standard cell in the first direction, wherein an output node of the first standard cell is connected to an input node of the second standard cell, an output active contact providing an output node of the first standard cell is connected to a wiring active contact among at least one dummy active contact included in the filler cell, and an input wiring providing an input node of the second standard cell is connected to the wiring active contact may be provided.
Abstract:
According to various embodiments, an electronic device may include: a housing, a flexible display configured to change in a form in response to a movement of the housing, a communication circuit configured to perform communication through a plurality of communication schemes, and a processor operatively connected to the communication circuit. The processor may be configured to: based on identifying that the form of the display is changed from a second form to a first form, control the communication circuit to perform a communication connection in a first communication connection scheme different from a second communication connection scheme designated for the second form among the plurality of communication schemes and perform communication through the first communication connection scheme in the first form.
Abstract:
A multi-bit flip-flop includes a first flip-flop having a first output driver connected to a first output pin and arranged on a first row, a second flip-flop including a second output driver electrically connected to a second output pin and arranged on a second row, and an internal hold buffer connected to the first output driver on the first row and the second flip-flop on the second row.
Abstract:
An integrated circuit according to some example embodiments of inventive concepts includes a substrate including a well including dopants of a first conductivity type, a first device region on the well, the first device region extending in a first direction parallel to the substrate, and a first isolation element inside the well, the first isolation element extending in the first direction, The first isolation element includes a first power rail configured to receive a power source voltage, and a first doping region between the first power rail and the well, the first doping region configured to transfer the power source voltage from the first power rail to the well, and including dopants of the first conductivity type.
Abstract:
An electronic device and a method operative therein monitor automatic wakeup events that occur during a power save mode. Wakeup events are monitored for respective applications executable within the electronic device. Applications with processing activity during the power save mode are then listed, on the basis of at least the monitored wakeup events. An indication of which apps are consuming battery power during the power save mode can then be obtained.